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Three New, 95 W AMD FX Series Processors Coming Up

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Before the end of this quarter AMD is set to introduce a bunch of fresh FX Series chips, including three boasting a 95 W TDP, the FX-4150 quad-core, the FX-6120 hexa-core and the FX-8140 octo-core.

The FX-4150 features a base clock of 3.9 GHz (4.1 GHz Turbo) and 12 MB of cache (4 MB L2 + 8 MB L3) while the FX-6120 has its cores set to 3.5 GHz (4.1 GHz Turbo) and packs 14 MB of cache. As for the FX-8140, it's clocked at 3.2 GHz (4.1 GHz) and has 16 MB of cache. All three models have an AM3+ package and are made using 32 nm process technology. No word on pricing yet.



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I wonder whether these are still on the B2 stepping.
 

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I wonder whether these are still on the B2 stepping.

Would be nice but if they are just binning the existing stepping for new model #'s I will pass and hold onto my 960T for a while longer
 
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if price on the FX 8100 is reduced enough to make any sense then it would be interesting.
 
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Still B2

B3 won't come till after Q1
 
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Hmm Bummer, got a source for that?
 
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So, going from 8120 to 8140 you get 100MHZ. Going from 8140 to 8150, however you get 400MHZ. Makes sense AMD, makes sense.
 
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FX-8140 - should be called as FX-8125?

FX-8100 around $160 would be perfect!
 
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no 4170??? is that going to be a B3 release???
 

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Im assumin this isnt piledriver
 
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WarraWarra

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Any idea if 800m or more transistors would be missing from this as well or can AMD cpu division do a quality check before the release it ?

Come on Rory send the AMD cpu guys to school so they can count, just not sure how you Rory would get the AMD cpu guys to read if they can not count like a 2.5 year old foreigner child can do in 2 or more languages.
 
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Any idea if 800m or more transistors would be missing from this as well or can AMD cpu division do a quality check before the release it ?

~2.0B is from Interlagos

GFlops and Transistor count from Interlagos was ported to Zambezi and Valencia
(This is what made Zambezi(FX) sound more awesome*)

So, there is no missing transistors

*Explanation:

2B Transistors?!!?!!? OH FUDGE DRAGON! and only 315mm²!!!!(The max limit for the socket die size was ~1.6B for 32nm)
64 Flops per Clock this is only EIGHT CORES!!!!
64 x 3.9 = 249.6 GFlops <-- Everyone who was reading the bad marketing was expecting this
vs
32 x 3.9 = 124.8 GFlops <-- What people got after the reviews hit and the information delivered^ was falsified
 
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Don't know what AMD is doing but the FX-8140 is a waist of a release. They need to stick with numbers that make sense. By releasing the HD 8120 @ 3.1 GHz, they messed up IMO. This should have been 3.20 GHz.
 
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It's not much of an improvement over the first batch, performance-wise.
But they do fall within the 95W power envelope, which is a step in the right direction.
As has already been said, maybe a bit of binning (and possibly some improvements in GloFo yields).
 
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As for the FX-8140, it's clocked at 3.2 GHz (4.1 GHz) and has 16 MB of cache.

I'm still confused to hell why AMD would shove 16MB of cache on a processor. Surely by that time you've started loading useless junk so that it's not empty (which would be even more useless)?

Or am I missing something important here?
 
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I'm still confused to hell why AMD would shove 16MB of cache on a processor. Surely by that time you've started loading useless junk so that it's not empty (which would be even more useless)?

Or am I missing something important here?

Zambezi, Zurich, Valencia, and Interlagos are server/workstation CPUs L3 Cache is important

L2 is cache is unified between the cores(each core knows what is in the L2 cache) and is the prefetcher
 
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I think they need to titen up the latencies and speed of the L3 cache. It just seems they are not utilizing it fully yet.
 

faramir

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64 Flops per Clock this is only EIGHT CORES!!!!
64 x 3.9 = 249.6 GFlops <-- Everyone who was reading the bad marketing was expecting this
vs
32 x 3.9 = 124.8 GFlops <-- What people got after the reviews hit and the information delivered^ was falsified

Given the multitude of blunders pertaining to Bulldozer AMD might as well describe it with teraflops, as in "terrible flop; many of them".
 
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Zambezi, Zurich, Valencia, and Interlagos are server/workstation CPUs L3 Cache is important

L2 is cache is unified between the cores(each core knows what is in the L2 cache) and is the prefetcher

It also played a role in gaming. Remember Athlon II vs Phenom II. PIIs would always beat the AIIs in many game benches because of the L3. Think there was some other non gaming uses where it was better, forget now which.

Was a factor when I went to get my 945. I thought about the 640 but when I bought, the difference between the two was maybe $25 due to sales. Just worth it more for me to have the 945 since I knew I'd use the L3.

Past gens of AMD chips I'd consider more as lacking in enough cache. Both L2 and L3. Heck my last chip before that was a 5000+ BE with only 512K L2 on each core. Yeah it was a big clocker but all the CPUs with 1MB L2 were just walking all over it in benches. Intel at the time was dumping on cache beyond that. High amounts of L2 with high clock speeds...no wonder AMD got left behind.
 
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