Not really a good sign.
That means the first thread cannot utilize all the resources available.
Why it can't be?
Moving the memory controller out for the die, for example, will lower the IPC.
There is no concrete proof, but an educated guess.
There are previous reports showing that the Intel "next gen" performance cores are giving regressions of IPC.
If Zen 5 is better than Zen 4 (>75% of Intel "current gen"performance core), which is very likely according to the progression of Zen...
They don't need to.
Zen 5 cores are expected to be at least 75% of "next gen" Intel performance cores while Zen 5c cores will crush "next gen" efficient cores.
Why would AMD drop prices when they know NVIDIA could undercut them because NVIDIA has higher margins?
Also AMD has got higher margin products competing the same wafer allocation.