Making silicon chips is not easy, requiring hugely expensive fabs, with massive clean-room environments and at every process shrink, the complexity and difficulty of making the things goes up significantly. It looks like TSMC and GlobalFoundries are both having serious yield problems with their 28 nm process nodes, according to Mike Bryant, technology analyst at Future Horizons and this is causing a rash of non-working wafers – to the point of having nothing working with some chip designs submitted for production. It seems that the root cause of these problems are to do with the pressures of bringing products to market, rather than an inherent problem with the technology; it just takes time that they haven't got to iron out the kinks and they're getting stuck: "Foundries have come under pressure to release cell libraries too early – which end up with designs that don't work,"
Bryant said. In an effort to try and be seen to treat every customer equally, TSMC is attempting to launch ten 28 nm designs from seven companies, but it's not working out too well: "At 45-nm, only NVIDIA was affected. At 28-nm any problems for TSMC will be problems for many customers"
GlobalFoundries are also struggling, although perhaps not quite as badly, according to Bryant: "However, there are recent comments of major yield problems with their 28-nm process actually being even worse than at GF [Globalfoundries]"
. Their 32 nm & 28 nm nodes are struggling, because they are using problematic gate first processing and this is worsened by the fact that they are using processes from two companies, AMD and IBM. Trying to debug two processes at once is causing serious headaches, compounded by a lack of cooperation between bases in Dresden and the US which appears to be caused by bad management.
Note that Bryant's assertions are at odds with what TSMC's CEO and chairman Morris Chang said when he spoke to analysts the previous day about the company's fourth quarter financial result: "Our 28-nm entered volume production last year and contributed 2 percent of 4Q11's wafer revenue. Defect density and new progress is ahead of schedule and is better than 40-45-nm at the corresponding stage of the ramp-up. We expect 28-nm ramp this year to be fast and we expect 28-nm will contribute more than 10 percent of total wafer revenue this year."
It will soon become apparent who is right.
Regardkess, the pressure isn't going to let up for these companies, since Intel have been successfully manufacturing at the 32 nm level for a year, making their Sandy Bridge processors. On top of that, in April, Intel will introduce their significantly smaller 22 nm-based process technology in the form of their Ivy Bridge CPUs which have been demonstrated to work very well indeed. These are based on Intel's proprietary Tri-Gate 3D transistor technology too, which gives further performance increases, hence upping competitive pressures significantly.
Sources: TG Daily, EE Times