Intel Shows Off Industry's First Fully-Patterned 450 mm Wafer

[btarunr]

At the SEMI Industry Strategy Symposium (ISS) held late last week, Intel unveiled the pride of its fabs, the industry's first fully-patterned (ready to slice) 450 mm wafer. Major semiconductor fabs around the world are locked in a race for who gets volume-production on 450 mm wafers going first. Among the contenders are Taiwan's TSMC, UAE's GlobalFoundries, and Korea's Samsung, and with the unveiling of the first fully-patterned wafer, Intel appears to have announced its lead. The 450 mm (diameter), thanks to its large surface area, significantly increases yields.

"[This] is an important step forward and it indicates that there will soon be substantial volume of patterned test wafers for use by suppliers in developing their 450 mm tools," stated Chuck Mulloy, a spokesperson for Intel. As for what Intel etched on the wafer, a report claims it could be large dies of simple (highly-patterned) devices such as flash. The fab reportedly used Impints' J-Fil imprint lithography technology that demonstrated 24 nm patterning with line edge roughness of less than 2 nm to 3Σ and critical dimension uniformity to 1.2 nm 3Σ, offering the prospect of 10 nm patterning with single-step process.



Source: X-bit Labs

[btarunr]

Many Thanks to NHKS for the tip.

[natr0n]

It looks to be as if cookie monster had taken a bite out of that wafer.


lol oh crap its a reflection and I just now see it.

[The Von Matrices]

Out of curiosity, why weren't large wafers used a long time ago? Hasn't it always made economic sense to have large wafers?

[HumanSmoke]

Originally Posted by The Von Matrices

Out of curiosity, why weren't large wafers used a long time ago? Hasn't it always made economic sense to have large wafers?

From the good folks at Wiki:

Other initial technical problems in the ramp up to 300 mm included vibrational effects, gravitational bending (sag), and problems with flatness. Among the new problems in the ramp up to 450 mm are that the crystal ingots will be 3 times heavier (total weight a metric ton) and take 2-4 times longer to cool, and the process time will be double. All told, the development of 450 mm wafers require significant engineering, time, and cost to overcome.

[source]

[de.das.dude]

so you slice this up like a pizza to get ivy bridge chips?

[_JP_]

No. In a matrix.

[de.das.dude]

i know its in a matrix.

[jihadjoe]

Chicago knows Pizza is best sliced in a matrix.

[xenocide]

Originally Posted by HumanSmoke

From the good folks at Wiki:

[source]

Additionally, one of the biggest problem points is polishing operations. It's not easy to get a wafer to polish evenly when you scale up the size...

[zithe]

He's wearing gloves but resting it on his shirt. I would have gotten in so much shit if I did that.

[btarunr]

Originally Posted by zithe

He's wearing gloves but resting it on his shirt. I would have gotten in so much shit if I did that.

That wafer is already expendable after it's come in contact with normal air (normal SPM). It can't be diced, bumped, or packaged anymore. He's using gloves just to prevent ugly fingerprints.