Some Athlon II X4 Chips Mutate to Phenom II X4

[btarunr]

The latest in AMD's almost deliberate series of processors that unlock into powerful / more capable processors is the Athlon II X4. Some of the earliest batches of these sub-$150 quad-core processors can be converted to more powerful Phenom II X4 chips using a simple trick. When unlocked, the chip will be equipped with 6 MB L3 cache. Supposed to have been based on the "Propus" core that physically lack a L3 cache, apparently early batches continue to use the "Deneb" core with L3 cache locked (using moist threads instead of a padlock). Currently there's no information as to which specific batches of Athlon II X4 620 and Athlon II X4 630 work. The trick works on some motherboards that support the Advanced Clock Calibration (ACC) feature. Simply set the ACC option in the BIOS setup to "Auto" from its default value of "Disabled", and you're done.



Source: Silicon Madness

[Breathless]

I find it very hard to believe that this is by mistake...

[[I.R.A]_FBi]

by now we know its amd trying to break in

[JATownes]

This is a great marketing strategy IMO...make some unlock, some not, and more people grab them up to try it....Brilliant...

[kenkickr]

It's like back in the day buying some Upper Deck cards and getting one of those 1-200 Ken Griffey Jr signed cards..I never got that but I did get a Dan Marino signed card that my dumbass traded for a box of Upper Deck Legends cards that didn't have shit inside

[MrAlex]

What the hell? So the early batches will have a larger die then?

[crazy pyro]

With all the unlocking being done through ACC I'd guess that it was deliberate, pretty clever of AMD though I'd say.

[HossHuge]

Originally Posted by kenkickr

It's like back in the day buying some Upper Deck cards and getting one of those 1-200 Ken Griffey Jr signed cards..I never got that but I did get a Dan Marino signed card that my dumbass traded for a box of Upper Deck Legends cards that didn't have shit inside

I hope the odds are better than 1-200, cause I'm gonna try and unlock my 550 soon.

Originally Posted by Breathless

I find it very hard to believe that this is by mistake...

+1 to that brother

[laszlo]

why don't they say "gamble with us you never know when you win"

[FreedomEclipse]

the real question here & now is....






the REAL question is is the processor stable after its unlocked???? E.g a tri-core can be unlocked to a quad but theres a 50/50 chance that it wont be 100% stable.

[MrAlex]

Originally Posted by FreedomEclipse

the REAL question is is the processor stable after its unlocked???? E.g a tri-core can be unlocked to a quad but theres a 50/50 chance that it wont be 100% stable.

Unstable cores sure...but unstable cache?

[FreedomEclipse]

Originally Posted by MrAlex

Unstable cores sure...but unstable cache?

then my question to you is...

what good is cache when the processor is unstable?

you cant do anything on an unstable processor since its gonna crash all the time.

[MrAlex]

Originally Posted by FreedomEclipse

then my question to you is...

what good is cache when the processor is unstable?

you cant do anything on an unstable processor since its gonna crash all the time.

Why would the processor be unstable though?

[toyo]

I think there is a new concept of "Unstable computing" beginning to carve a niche here. You don't have many money, but you are a gambler. And what a gamble this is! In the case you lose, you still win something... and this new 45 nm AMDs are certainly not to be thrown off the window.

[Fx]

Originally Posted by kenkickr

It's like back in the day buying some Upper Deck cards and getting one of those 1-200 Ken Griffey Jr signed cards..I never got that but I did get a Dan Marino signed card that my dumbass traded for a box of Upper Deck Legends cards that didn't have shit inside

LOL, dumbass

[FreedomEclipse]

Originally Posted by MrAlex

Why would the processor be unstable though?

My bad, I thought they were talking about unlocking Cores :P

[wiak]

Originally Posted by MrAlex

Unstable cores sure...but unstable cache?

more like defect cache

[DarthCyclonis]

I have no doubt that AMD is allowing this to happen on purpose. Think about....What a way to increase sales and at the same time saving face with investors without making it look like they are giving away their highend cores.

[WarEagleAU]

It is a smart move by them because you know they have to know about it. A lot of folks read TPU, Anandtech, etc and its plastered all over the place.

Oh and as an aside not related to this at all, congrats W1Z, TPU, and realtemp for making CPU Magazines Appalooza list this year!

[EarlZ]

But if AMD did disable them coz they are "defective cores" whats the point of using defective cores that are known to crash at a certain level of usage ?

[t77snapshot]

Originally Posted by WarEagleAU

Oh and as an aside not related to this at all, congrats W1Z, TPU, and realtemp for making CPU Magazines Appalooza list this year!

I just read about this yesterday and I thought it was awesome to see TPU's realtemp in the latest issue of cpu mag, Congrats

--------------------------
On topic: I think this is a great marketing idea from AMD. I might just have to buy one of these to see if I get the lucky batch....well if the price is right.

[crazy pyro]

Originally Posted by EarlZ

But if AMD did disable them coz they are "defective cores" whats the point of using defective cores that are known to crash at a certain level of usage ?

I think it's more that they prefer to use defective ones but to meet demand they'll disable good cores if required.

[DarthCyclonis]

Originally Posted by crazy pyro

I think it's more that they prefer to use defective ones but to meet demand they'll disable good cores if required.

Again...They have chips that have 2 stable and working cores, the other 2 might not yield the performance they want.

Even thought they are not directly marketing 4 cores with X2 chips per say....Without locking the "bad" two cores out AMD is basically saying this "Buy this X2 chip...You may be able to unlock and use 4 but if not you only paid for 2". I see nothing wrong with this and is good for consumers who know what they are buying. Same thing they are doing with the L3 cache.

[Sihastru]

Originally Posted by DarthCyclonis

Again...They have chips that have 2 stable and working cores, the other 2 might not yield the performance they want.

Even thought they are not directly marketing 4 cores with X2 chips per say....Without locking the "bad" two cores out AMD is basically saying this "Buy this X2 chip...You may be able to unlock and use 4 but if not you only paid for 2". I see nothing wrong with this and is good for consumers who know what they are buying. Same thing they are doing with the L3 cache.

Do you even bother reading the stuff? The article is referring to Athlon X4 chips that should be based on a new "Propus" core, and istead AMD is giving you a "Deneb" core.. it's not about disabled cores, it's about disabled L3 cache...

[aj28]

Originally Posted by toyo

I think there is a new concept of "Unstable computing" beginning to carve a niche here. You don't have many money, but you are a gambler. And what a gamble this is! In the case you lose, you still win something... and this new 45 nm AMDs are certainly not to be thrown off the window.

It's not about unstable computing, it's about 100%-stable computing versus 99.99%-stable computing. There's not one processor being sold on the market which qualifies as the latter. Why do you think such a big deal was made of the TLB bug? Fact of the matter is, while it was experienced in the wild by very, very few users, it was still a defect, and that's something that's flat-out cannot tolerated in the CPU market, even if chances are that you'll never encounter it.

(By the way, try to see this as an OEM, not an end-user!)

Based on that ideology, I think that the majority of users unlocking these cores aren't practicing any sort of it's-okay-that-it-crashes-every-day-or-two computing, they're simply saying that they're okay with a known defect which, as time will tell, they'll probably never see.