Microsoft Joins Hybrid Memory Cube Consortium

[Cristian_25H]

The Hybrid Memory Cube Consortium (HMCC), led by Micron Technology, Inc., and Samsung Electronics Co., Ltd., today announced that Microsoft Corp. has joined the consortium. The HMCC is a collaboration of original equipment manufacturers (OEMs), enablers and integrators who are cooperating to develop and implement an open interface standard for an innovative new memory technology called the Hybrid Memory Cube (HMC). Micron and Samsung, the initial developing members of the HMCC, are working closely with Altera, IBM, Open-Silicon, Xilinx and now Microsoft to accelerate widespread industry adoption of HMC technology.

The technology will enable highly efficient memory solutions for applications ranging from industrial products to high-performance computing and large-scale networking. The HMCC's team of developers plans to deliver a draft interface specification to a growing number of "adopters" that are joining the consortium. Then, the combined team of developers and adopters will refine the draft and release a final interface specification at the end of this year.





Adopter membership in the HMCC is available to any company interested in joining the consortium and participating in the specification development. The HMCC has responded to interest from more than 75 prospective adopters.

As envisioned, HMC capabilities will leap beyond current and near-term memory architectures in the areas of performance, packaging and power efficiencies, offering a major shift from present memory technology. By opening new doors for developers, manufacturers and architects, the consortium is committed to making HMC a new standard in high-performance memory technology.

"HMC technology represents a major step forward in the direction of increasing memory bandwidth and performance, while decreasing the energy and latency needed for moving data between the memory arrays and the processor cores, " said KD Hallman, General Manager of Microsoft Strategic Software/Silicon Architectures. "Harvesting this solution for various future systems could lead to better and/or novel digital experiences."

One of the primary challenges facing the industry -- and a key motivation for forming the HMCC -- is that the memory bandwidth required by high-performance computers and next-generation networking equipment has increased beyond what conventional memory architectures can provide. The term "memory wall" has been used to describe this dilemma. Breaking through the memory wall requires architecture such as the HMC that can provide increased density and bandwidth at significantly reduced power consumption.

Additional information, technical specifications, tools and support for adopting the technology can be found at www.hybridmemorycube.org.

[badtaylorx]

wow....sorry bout yer luck ddr4

this is gonna be a game-changer (overused cliche)

it actually looks just like an older p4 cpu....im sure design teams will be able to put cool heatsinks on it and make it look cool too

[EpicShweetness]

Well something "revolutionary" or "game changing" happened the early 1990's called RIMM, Rambus standard, and look were it is now. Still if this HMC try's on other front's other then RAM standards's I can see future implications especially if it promises that much extra bandwidth.

[D007]

OOh I hope it looks like those cubes..lol..

[RejZoR]

I want my own companion cube!

[Perra]

Originally Posted by EpicShweetness

Well something "revolutionary" or "game changing" happened the early 1990's called RIMM, Rambus standard, and look were it is now. Still if this HMC try's on other front's other then RAM standards's I can see future implications especially if it promises that much extra bandwidth.

Wouldn't call it revolutionary and Rambus really dug their own grave with RIMM, way too greedy with the licensing fees. Plus it was a lot more complex than sdram with not much gain.

Lets hope this cube is better than that

[theoneandonlymrk]

not likely to be seen by the consumer untill ddr4 has been round a few years, IBM just anounced successfull Tsv stacked chip manufacture and in that thread i said it would be used best for stacked memory or memory below ic structures, go me and what with the future production of(stacked) ps4 chips,AMD Apu's, ibm super scalars and what not ,consumer versions of this are a distant dream imho , ie these will be way too dear for anything other then servers the first 2 years or so anyways

I like the way their making a stacked ddr4(? most likely though) memory chip, sound like a soddin data holo cube but then stacked memory chip does sound a bit shit