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#1 |
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cpu multiplier and transistor count..
plz help me with the question that whether the transistor count increases with increase in multiplier in a same series of processors?
my catch here is that why do we say that the overclockability of higher model is more? just because of higher multiplier or some thing else... my practical life example: i'm having a sempron clocked at 1.8 ghz and another clocked at 2.1ghz both with 256kb l2 cache. wen i overclock both of them @2.4 both of them give the same performance that i benchmarked using 3dmark05. the diff is that the model with 9x multiplier reaches 2.4ghz @266 fsb and the model with 10.5x multiplier reaches 2.4ghz @228 fsb... and no increase in performance is noticed in both of them if fsb is increased further. so why do we prefer higher model for overclocking? |
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#2 |
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I don't know exactly what you mean there, but:
A higher multiplier means you need less FSB for the same overclock (as you mention). Basically, you would be able to clock it higher with the same FSB, so you might be able to get a better clock out of it. |
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#3 | |
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Seņor Moderator
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Quote:
Basically chipsets and CPU's can't just endlessly increase the FSB as this wil stress the bus more. However, the multiplier doesn't have this limit. So say your chipset won't like anything past 333Mhz, increasing the multiplier still gets you a higher clock. Of course this has a limit as well. Of course lowering the multiplier often allows a slightly higher FSB as well, you'll just have to find the right balance here. |
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#4 | |
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Quote:
All cores have an amount of memory in them ( simple explanation) . The core with the internal memory , it is one complete "engine" , to perform calculations . The word "pipeline" is the "connector " who connects its transistor with the core memory. As more high is the transistors count , equally long are also and the pipeline. Conclusions: No1 : More transistors count = more long pipeline . No2 : Long pipelines needs more relaxing timings , than small pipelines, " so to offer enough time " to all the transistors to communicate with the core memory simultaneously. Practical example with DDR memory: a modo with DDR timings 4-4-4-8 OC better than DDR with 2-2-2-5 . Why ? Because by elevating MHZ speed , the memory handles the more speed based on the timings that it has at default latency , if the MHz speed get higher than normal , it comes to the point , that balance is lost In our "Calculating engine", and that causes the known CPU errors . The need for "long pipeline" can be caused , or because of more transistor count as Core transistors , or as memory transistors . "Thats my simplified explanation." |
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#5 | |||
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Benevolent Dictator
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also "extreme edition" processors have their multiplier unlocked so you can overclock without changing the fsb |
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#6 |
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well thank you everyone...i think my doubts are all cleared...
thanks again.. |
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#7 |
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Maximum Overclocker
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Well first of all, higher "binned" chips are just better quality chips, for example the E8400 and E8600 are exactly the same thing, except chips branded "E8600" just happened to come out better than others (branded "E8400"), and so since they came out better, they were given a higher multiplier, which equals a higher core speed, and a higher selling price. Lower binned chips can't OC as far for 2 reasons: first, they just happened to come out worse than other chips, and second they don't get as big of a multiplier as others so that limits them too.
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