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advanced timings/formulas

Discussion in 'Motherboards & Memory' started by d1nky, Jun 14, 2013.

  1. d1nky

    d1nky

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    ok guys, this weekend im learning about memory timings.

    ive been reading up on it for several hours and testing out some higher clocks/ different timings for memory.

    one thing im stuck on is:

    Write to Precharge Delay / Write Recovery Time or tWR: This sets the number of clock cycles between the completion of a valid write operation and before an active bank can be precharged. Write to precharge formula is tCL -1 +(Burst Legnth / 2)+tWTR

    either im going mad or deprived of nutrients (forgot about food) but that formula to me

    TCL minus 1 + (burstlength divided by 2) + TWTR = twr

    My current timings (10+4+8) = 22

    well my problem is my twr has a max value of 16 in bios.

    source http://forum-en.msi.com/faq/article/ddr3-memory-timings-explained

    has anyone else got any advice or data sheets to help?


    and tbh there should be a guide on TPU for this ;)
    and yea i know this is advanced and some may think forget it, but i want to learn!
  2. Petey

    Petey New Member

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    Saw this and I have tried a little memory over clocking with a I5 2500k, long time ago, on some one elses pc of course. It doesnt seem to like any number altering, I don't even know if its all-right to go overclocking with stepping, might want to check with a fx processor. I dont know if it does effect stepping of the processor, if find out please share. I've gone in, done the lower 4 numbers x-x-x-xx
    things seemed to get quarky and un-stable. But when the 2nd digit is left alone it kind of works, the tcrd. The last Tras can be the worst, it works great for a while, then gaming it seems to mess with gpu, frequent crashes.
    I did find this with your post and it looks like your off a bit 10-4-8 22 are very strange numbers for bringing latencys down
    quote from fourm
    When overclocking your timings, you must keep the tRAS = CL + tRCD+tRP (+/-1)
  3. d1nky

    d1nky

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    ive just asked some others and was told that subtimings dont change stepping, but like always anything unstable will cause problems.

    that calculation i gave with my numbers was the original timings on this ram, and well the formula didnt fit, thats why i asked.

    memtest and prime95 are fully stable at 11-13-13-31 1T 1.65v 2500mhz

    but i didnt include the TWR formula.
  4. Petey

    Petey New Member

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    wow 25k rippin, if your down to 10-4-8-22 at 25k I hope your using liquid cooling or put a fan directly above memory. What is your voltage, Im sure you know if you look at timing like with lower speed memory it allways seems to follow a pattren. Like 8-8-8-24, look at factory timings of slower memory like 1800 or 2000 then add numbers on your way up 1 digit at a time. Getting memory stable at 2500 is probably pretty crazy.
    Did you hear anything about intel, cpu isn't effected by latencys, or subtimings, i guess if its alright maybe try and get them lower it does make a diffrence.

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