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AMD prepares three-core processors

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this thread is truly a humorous read:D:p:D
 

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My avatar explains it all.
 

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you do understand intel sells celerons currently which are bad dual cores rebinned to single core with low cache correct?

If that was directed at me, yes I already covered that in my other post.

nothing new there you know WR cpuz clocks are made with quads disabled to 1x core correct?

Yes, usually they are done with at least 2 of the cores disabled. But my point still remains, if it is that easy to disable a core via a motherboard's BIOS I would think it would be just as easy for Intel to do it on the chip itself.
 

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If that was directed at me, yes I already covered that in my other post.



Yes, usually they are done with at least 2 of the cores disabled. But my point still remains, if it is that easy to disable a core via a motherboard's BIOS I would think it would be just as easy for Intel to do it on the chip itself.

no the 1st one was not directed at you i was just pointing it out since ppl cant read apparently :D they kept missing that point :roll:

as for the second one i agree with that and if you look amd has been doing this same thing since AXP had the cache diasbled and rebinned to be durons
 
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