Fiji Core overclocking

[the54thvoid]

Simple thread, posted here in camp red for one reason - why can't Fiji over volt the core? I'm upgrading soon and frankly, I'm disappointed Fiji looks stuck at close to 1GHz. I genuinely would have bought it if it were more flexible.

I'm putting this here so those that trawl the web for AMD info can maybe shed some light, hell maybe some AMD engineers can come along incognito and share some knowledge. Looking at how good fiji is at 1050Mhz (compared to 980ti's at 1200Mhz), you'd think Fury X would be romping home if only it would overclock properly.

So what is the issue. Is it AMD locking it down for power and heat reasons? Is it an oversight from the volt mod software tools (Afterburner etc) that they haven't figured it out yet? Is it already at it's maximum for the silicon/architecture?

How many genuine techy's with the cash to spend have gone to 980ti's because of this? How many would have stayed or swapped to team Red if it did overclock well. Remember - we're talking core here.

Thoughts and technical musings appreciated. This is for tech discussion on Fury (Fiji) only - there is NO need to mention Nvidia in any way shape or form - the topic is about Fiji and Fiji only.

 

[Finners]

This is all speculation and gueswork and I expect to get corrected by someone who knows but I think it's due to the HBM.

Hawaii and from what I can tell Tonga cards, the core voltage and memory voltage are linked and you cannot raise one with raising the other.

So I assume Fiji is the same and they either need to do more testing to ensure HBM can take a little more voltage without causing damage or they know it can't so they have locked out voltage control.

Time will tell I guess now that AIB have Fiji cores and are sticking them on custom PCB's for the Fury pro cards.

 

[OneMoar]

http://www.pureoverclock.com/2015/07/amds-r9-fury-and-voltage-control-coming-soon/
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[the54thvoid]

http://www.pureoverclock.com/2015/07/amds-r9-fury-and-voltage-control-coming-soon/
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Going through the source of the info from your link I have so far found this, which is posted after the initial comment:

That's both positive and negative info. Positive: device 30h in the dump is IR3567B with no doubts, so driver-level I2C access is indeed working and VRM can be accessed on software level. Negative: such reaction on overvolting (graphics card downclocking) smells by hitting some hardware limit, I'm not too optimistic on improving it.

http://forums.guru3d.com/showthread.php?p=5110209#post5110209

 

[OneMoar]

Going through the source of the info from your link I have so far found this, which is posted after the initial comment:



http://forums.guru3d.com/showthread.php?p=5110209#post5110209

I knew that much 3 weeks ago ... I told everybody that this silicon just can't handle it ... I suspect that the current inter-poser is very leaky and does not tolerate higher loads
the noobs will be burning there cards up left and right ...

 

[the54thvoid]

I knew that much 3 weeks ago ... I told everybody that this silicon just can't handle it ... I suspect that the current inter-poser is very leaky and does not tolerate higher loads
the noobs will be burning there cards up left and right ...

The interposer is 65nm I think? Does that have issues with a 28nm chip?

 

[OneMoar]

The interposer is 65nm I think? Does that have issues with a 28nm chip?

why do you think amd shipped the fury x with water cooling AND barred vendors from using there own cooling solutions
I think the interposer simply doesn't tolerate getting over say 75c ... being 65nm that would make sense
when pumps start failing cards are gonna smoke ...

 

[Aquinus]

Is it possible that the GPU and HBM run at the same voltage? That would make for a dangerous dynamic IMHO if you allow people to over-volt it. There could be a fear that increased voltages might be bad for HBM if this is true.

 

[rtwjunkie]

why do you think amd shipped the fury x with water cooling AND barred vendors from using there own cooling solutions
I think the interposer simply doesn't tolerate getting over say 75c ... being 65nm that would make sense
when pumps start failing cards are gonna smoke ...

You paint a dire prediction of an entire product line going bad! I sincerely hope you are wrong, for AMD's sake.

 

[OneMoar]

Is it possible that the GPU and HBM run at the same voltage? That would make for a dangerous dynamic IMHO if you allow people to over-volt it. There could be a fear that increased voltages might be bad for HBM if this is true.

I doubt that HMB operates at 1.3V I think its current handling capability and temps more then anything

 

[OneMoar]

You paint a dire prediction of an entire product line going bad! I sincerely hope you are wrong, for AMD's sake.

its cooler master junk ... they have a bad reputation with anything AIO water cooling ASTEK as well ...
if I was to get a fury X the first thing I would do would be to cut the lines and splice a MCP pump in there and possibly add a res

 

[Loosenut]

its cooler master junk ... they have a bad reputation with anything AIO water cooling ASTEK as well ...
if I was to get a fury X the first thing I would do would be to cut the lines and splice a MCP pump in there and possibly add a res

+1^

 

[the54thvoid]

Is it possible that the GPU and HBM run at the same voltage? That would make for a dangerous dynamic IMHO if you allow people to over-volt it. There could be a fear that increased voltages might be bad for HBM if this is true.

Does the interposer even have voltage? I thought it might be a simple substrate to allow the HBM - Fiji traces to run through? But then, I'm a bit naive when it comes to silicon engineering.

 

[OneMoar]

Does the interpose even have voltage? I thought it might be a simple substrate to allow the HBM - Fiji traces to run through? But then, I'm a bit naive when it comes to silicon engineering.

its a insulator and a interconnect so what happens when any bit of silicon gets hot .. it starts losing its ability to insulate
see page two of this
https://www.amd.com/Documents/High-Bandwidth-Memory-HBM.pdf
so looking at that image what happens if that interposer gets hot and starts leaking voltage
HMB's interconnect/circuit density is much much tighter then normal GDDR5
and I suspect those TSv's aren't gonna tolerate high temps/more ampage very well at all ..

 

[mirakul]

With the release of Fury non X, it's clear that interposer and HBM can tolerate more than 70C

And why the hell an interposer with no logic gate can have leakage???

 

[ne6togadno]

Does the interposer even have voltage? I thought it might be a simple substrate to allow the HBM - Fiji traces to run through? But then, I'm a bit naive when it comes to silicon engineering.

well those traces carry current. and when there is a current and resistance there is heat too.

its a insulator and a interconnect so what happens when any bit of silicon gets hot .. it starts losing its ability to insulate
see page two of this
https://www.amd.com/Documents/High-Bandwidth-Memory-HBM.pdf
so looking at that image what happens if that interposer gets hot and starts leaking voltage
HMB's interconnect/circuit density is much much tighter then normal GDDR5
and I suspect those TSv's aren't gonna tolerate high temps/more ampage very well at all ..

i wonder if thermal pads between hbm chips will do the trick

 

[OneMoar]

well those traces carry current. and when there is a current and resistance there is heat too.

this
its basic electronics here amperage+resistance = heat
and it gets orders of magnitude worse when you boil everything down to a micron level

 

[W1zzard]

It can overvolt just fine, developers just need to figure out how to talk to the voltage controller.

It's the same one as on previous cards, so the we know what we need to say to the controller, just missing how to send data to it.

I spent around 2 hours on it so far without success, which is more than for other cards, it's not trivial

 

[mirakul]

this
its basic electronics here amperage+resistance = heat
and it gets orders of magnitude worse when you boil everything down to a micron level

Well, it's not true with silicon. The resistance of a transistor in conduct mode is close to zero. Electronics 101.
Silicon chips produce heat because of logic gates. An interposer with no logic gate will produce close to no heat.

 

[Aquinus]

this
its basic electronics here amperage+resistance = heat
and it gets orders of magnitude worse when you boil everything down to a micron level

Yes, but it's also a much shorter distance than GDDR5 on the PCB itself. Don't forget that the length of the circuit has just as much to do with it since resistance usually gets higher, the longer the circuit is, and smaller the shorter it is (relatively speaking.)

 

[ne6togadno]

this
its basic electronics here amperage+resistance = heat
and it gets orders of magnitude worse when you boil everything down to a micron level

i read somewhere that different process nods has different thermal extension but i cant remember details. i have to dig a bit for accurate info

 

[OneMoar]

It can overvolt just fine, developers just need to figure out how to talk to the voltage controller.

It's the same one as on previous cards, so the we know what we need to say to the controller, just missing how to send data to it.

I spent around 2 hours on it so far without success, which is more than for other cards, it's not trivial

someone on the guru3d board said he was able to get 0- to +100mv over voltage but it was making the card drop to 2d clocks
and unwinder said he suspects it is indeed a hardware limit
if there is a problem it would make sense for AMD to have a fail-safe should the voltage go out of spec either that or the driver power table is broken

 

[Aquinus]

Well, it's not true with silicon. The resistance of a transistor in conduct mode is close to zero. Electronics 101.
Silicon chips produce heat because of logic gates. An interposer with no logic gate will produce close to no heat.

CPUs produce heat because of resistance/impedance. Logic gates tend to have more than just wires. So it would release heat less than logic gates. However, if we're also talking power delivery, that very well can create heat because we're talking about much more current than a typical logic gate would be utilizing. There simply isn't enough info to know how much leakage the interposer itself is introducing.

I spent around 2 hours on it so far without success, which is more than for other cards, it's not trivial

Out of curiosity, how do you go about that? Do you have some software to directly interact with the I2C bus on the GPU directly? I don't do dev work like as I tend to do higher level stuff like stuff for the web, so I would be interested in hearing how you go about it.

 

[mirakul]

CPUs produce heat because of resistance/impedance. Logic gates tend to have more than just wires. So it would release heat less than logic gates. However, if we're also taking power delivery, that very well can create heat because we're talking about much more current than a typical logic gate would be utilizing.

Do you know why a CPU at load produces more heat? Because of more logic gates being utilized, my friend. Yes, it's all about resistance. But the resistance of silicon is a special one that created the whole Electronics Industry.
And do you know why the current is large? Because it is the sum of numerous logic gates's current.

 

[Aquinus]

Do you know why a CPU at load produces more heat? Because of more logic gates being utilized, my friend. Yes, it's all about resistance. But the resistance of silicon is a special one that created the whole Electronics Industry.
And do you know why the current is large? Because it is the sum of numerous logic gates's current.

I think you forgot about all of the circuitry connecting those logic gates and how logic gates tend to produce heat when they're switching on or off, when resistances is changing. You can run a transistor so it's partially on and it almost acts like a resistor, creating heat all the while. This is why PWM is used to create buck converters because PWM ensures the transistor is fully on or off which reduces the amount of leakage from the transistor because it spends less time in a partially on/off state which has resistance. Also, I think you're forgetting about the wires that connect all of those logic gates together too. Smaller wires also means higher resistance/impedance.

A transistor fully turned "on" has very little resistance, depending on the type of transistor. Some or better than others, but the one thing that's true for all of them is that when they're not fully on or off, their resistance is higher than when it's fully turned on. It's the nature of transistors.