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First 28 nm Cortex-A9 POP Available for GLOBALFOUNDRIES 28nm-SLP HKMG Process

Discussion in 'News' started by Cristian_25H, Feb 23, 2012.

  1. Cristian_25H

    Cristian_25H News Poster

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    ARM today announced the availability of the ARM Cortex-A9 MPCore Processor Optimization Pack (POP) for GLOBALFOUNDRIES' 28 nm-SLP High-K Metal Gate process technology. Optimized for mobile, networking and enterprise applications, the energy-efficient ARM POP 28 nm-SLP for Cortex-A9 processors delivers a performance range from 1 GHz to 1.6 GHz for worst case conditions, with up to 2 GHz in typical conditions. This provides a wide range of flexibility for System-on-Chip (SoC) designers to optimize performance and energy-efficiency using the ARM Artisan Physical IP Platform and Cortex-A9 POP.

    "As consumer demand for high-performance, energy-efficient mobile devices increases, GLOBALFOUNDRIES and ARM are lowering the risk for customers by delivering optimized Cortex-A9 cores on a proven 28 nm SoC process," said Kevin Meyer, vice president of design enablement strategy and alliances, GLOBALFOUNDRIES. "This latest ARM physical IP solution for our 28 nm-SLP process delivers industry-leading performance and energy-efficiency, while also decreasing time to market for customers' latest mobile products."

    GLOBALFOUNDRIES' 28 nm Super Low-Power (SLP) platform is designed for power-sensitive mobile and consumer applications, and is based on the company's production-proven 32/28 nm HKMG technology. ARM already supports the GLOBALFOUNDRIES 28 nm-SLP process with a comprehensive Artisan Physical IP Platform. This includes process tuned 9 track and 12 track multi-Vt standard cell libraries, power management kits, ECO kits, ARM Artisan high-density and high-performance optimized memory compilers, as well GPIO through the ARM DesignStart online IP access portal.

    "Smartphones are increasingly becoming the devices that consumers rely on for a wide range of applications. To deliver the user experience that they would expect, OEMs and their semiconductor suppliers must deliver on the promise of high-performance and energy-efficiency," commented John Heinlein, vice president of marketing, physical IP division, ARM. "Single and dual-core Cortex-A9 processor-based mobile devices are already widely available and delivering on this demand. The new 28 nm POP provides an easy next step to maintain a competitive edge."

    ARM POPs include three critical elements necessary to achieve an optimized ARM core implementation. First, it contains Artisan Physical IP logic libraries and memory instances that are specifically tuned for a given ARM core and process technology. This Physical IP is developed through a tightly coupled collaboration with ARM Processor Division engineers in an iterative process to identify the optimal results. Second, it includes a comprehensive benchmarking report to document the exact conditions and results ARM achieved for the core implementation. Finally, it includes a POP Implementation Guide that details the methodology used to achieve the result, to enable the end customer to achieve the same implementation quickly and at low risk.
  2. Steevo

    Steevo

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    But what power envelope?
    10 Million points folded for TPU
  3. thematrix606 New Member

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    As with all shrink, I suppose either same or lower? :toast:
  4. R_1

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    Probably 300-400 Milliwatt per core at average in general purpose use.

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