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Ram Timing Benchmark (CL/tRCD/tRP/tRAS/CR/tRC/tRFC/tREF)

Discussion in 'Motherboards & Memory' started by DGLee, Jun 24, 2011.

  1. DGLee

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    Hello. it's newbie on this forum.
    I tested my memory with several different ram timing combinations. Tests include:

    1. Super PI 32M digits of Pi calculation
    2. Lavalys Everest Cache & Memory Benchmark (Bandwidth & Latency)
    3. Video Encoding (1080p TP -> mkv with H.264)

    Tested ram timing items are:

    1. CL: 6~11
    2. tRCD: 9~11
    3. tRP: 6~11
    4. tRAS: 24~30
    5. Command Rate: 1 / 2
    6. tRC: 15~40
    7. tRFC: 90ns / 110ns / 160ns / 300ns / 350ns
    8. tREF: 3.9ms / 7.8ms

    For test of a ram timing component, other components (except tRC and tREF) are set to the lowest possible values for variable control while tRC and tREF are to have the highest possible values as default.)


    System setting is as follows:

    - CPU: AMD Phenom II X6 @ 4.0GHz / NB 2.75GHz
    - M/B: ASUS M4A89GTD-PRO USB3
    - RAM: G.SKILL PIS PC3-19200 CL9 4GB (2GB x 2) @ 2000MHz
    - Storage: Intel X25-M G2 80GB
    - PSU: PC Power & Cooling Silencer 910W 80PLUS Silver


    Before we see the results below, I think I need to mention about the methodology used in this article: I used two different techniques to analyze the results.

    First is to analyze 'numerically': calculate the ratio between 'rate of perf. change' and 'rate of ram timing value change'. It emphasizes a ram timing's theoretical contribution to performance, but not necessarily means that we could/would get those amount of perf. gain (or loss) from dealing with said ram timing component since in practice we don't always treat a ram timing as numerical value (e.g. in BIOS, we don't set 10% more to CL, 5% less to tRCD... see what I mean?)

    Rather, many BIOSs provide ram timing options as up/down menu so that a user cannot accurately change the value itself but can change only the provided 'degree' (e.g. in many BIOS, for tREF, there's 3.9ms / 7.8ms / 15.6ms... and so on. There's no 4.0ms or 5.0ms. It's likely a 'degree' rather than a 'numerics'.)

    So, the second method is to analyze upon 'degree change': calculate the ratio between 'rate of perf. change' and 'number of degrees change'. It is more likely what we can expect when we're dealing with a ram timing component in practice (in BIOS), but it is apart from theory.



    Okay. Then we see the results!



    1. Super PI

    Note that among ram timing items only tRFC and tREF are indexed by 'time unit' (second) while others by clock count (how many clock cycles (= inverse time unit) are consumed for a ram timing's operation). It's because they (tRFC and tREF) directly indicate characteristics of electrical working mechanism of a memory chip. Both are related to a memory's refresh rate: tREF determines how frequently a chip shall be refreshed and tRFC determines the time elapsed between the moment of 'refresh' (memory access is unavailable) and the moment when a memory access is back to available. So in case of tREF, the bigger value implies the better performance.

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    Theoretical Analysis for Super PI Test

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    In theory, CL / tRFC / tRCD / tREF and tRAS contribute more than 1% to performance, respectively.
    (Note: 4% contribution of CL means, when we change the value of CL by 10%, the performance will be affected by 10% x 4% = 0.4%)

    Practical Analysis for Super PI Test

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    In practice, tRFC and tREF seem to be important since their minimum changeable units of '1-degree' in BIOS are bigger than others. (i.e. CL's minimum unit is '1 clock counts' while tRFC's minimum unit is '20~50ns', which is equivalent to 20~50 clock counts under 1000MHz.)

    (continued)
     
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  2. DGLee

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    2. Everest Cache & Memory Benchmark: Memory Bandwidth

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    Theoretical Analysis for Bandwidth Test

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    Practical Analysis for Bandwidth Test

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    (continued)
     
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  3. DGLee

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    3. Everest Cache & Memory Benchmark: Memory Latency

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    Theoretical Analysis for Latency Test

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    Practical Analysis for Latency Test

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    Latency test seems more dependant to ram timings than previous tests (Super PI & Bandwidth).
    tRFC / Command Rate and CL affects similarly (around 2~2.5%) in practice.

    (continued)
     
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  4. DGLee

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    4. Video Encoding

    This test is to measure the time of converting 1920x1080 TP file to MKV, same resolution.
    H.264 codec is used. No GPGPU acceleration.

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    Theoretical Analysis for Encoding Test

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    Practical Analysis for Encoding Test

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    Similar to Super PI test, no ram timing affects more than 1% in practice and tREF is ranked at the highest.


    So far, we covered 3 areas: Floating-point calculation, synthetic benchmark and video encoding.
    Here's the graphical representation of how a ram timing affects performance through these three areas.

    Theoretical Analysis

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    As you can see, CL holds the most shares in theory. tRFC and tRCD seem meaningful too.

    Practical Analysis

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    In practice, in addition to major shareholders in theory, Command Rate and tREF are also important.


    Thanks for reading my article :)

    Have a nice day~



    PS. this article had also been uploaded to my blog: http://udteam.tistory.com/348 ;)
     
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  5. cheesy999

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    very interesting, now i know exactly where to O/C :), (i had to change my post as moving it made it not make sense)

    EDIT: Moved again :banghead: (wasn't concentrating)
     
  6. EarthDog

    EarthDog

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    Nice to see some common knowledge in becnhing circles make it out to the public. Nice work!
     
  7. Maban

    Maban

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    Very nice.
     

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