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RunCore Displays Single-Chip SSDs

Discussion in 'News' started by btarunr, Jan 14, 2012.

  1. btarunr

    btarunr Editor & Senior Moderator Staff Member

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    RunCore showed off its engineering potential in four "single-chip" solid-state drives (SSDs). If we're playing semantics here, almost every USB flash drive in the market these days is a "single chip SSD", but in context of these drives, "single chip" refers to a component that combines MLC NAND flash and a SATA interface controller into a single package. The number of NAND flash channels internally is not known, but RunCore thinks these chips should offer good performance in the value segment.

    The blue PCBs in the first picture depict single-chip SSDs in three main client form-factors: 2.5-inch SATA, 1.8-inch SATA, and mSATA. As you can see, there's just one main chip, no controller, no cache DRAM, nothing else, except power-conditioning components and firmware ROM chips on the back side of the PCB.

    [​IMG]

    The device with the red-colored PCB is what RunCore is referring to as R-Drive. It uses four of these single-chip SSDs as subunits on a single PCB, sharing a single SATA power source, but without a localized RAID logic, the subunits are wired out as individual SATA drives. The onus is on the user to connect those drives to a motherboard supporting RAID, or run them as individual drives in AHCI mode, whichever way the user prefers.

    [​IMG] [​IMG]
  2. newtekie1

    newtekie1 Semi-Retired Folder

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    If the price is right, I could see the 4 port one being very useful in virual machines. A dedicated SSD to run each virtual machine OS off of in a very small form factor. Any word on size, because if each one is only 8GB or something small like that these would be useless?
    Crunching for Team TPU More than 25k PPD
  3. Andy77 New Member

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    There were some past articles about some SSD SoC's, 32-64 GBish... maybe these work on the same idea and same sizes, but I doubt these will have the same speeds as typical SSD's, which usually rely on multiple channel controllers from multiple memory chips to deliver acceptable speeds by today's standards.
  4. WarraWarra New Member

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    I can see a future for this with several modifications.

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