show me that a q6600 is no good now

[Shambles1980]

yeah sure i do.
if you sleep better at night thinking that then thats ok.
just dont research it ok.

i will never ever understand the ignorance of fan boys..
off to play a game on the AMD fx-8120
It can do that and it can do it just fine. can do a whole bunch of other stuff fine too.

but its not 8 core.

 

[Toothless]

i will never ever understand the ignorance of fan boys..

Who here is fanboying? We're sitting here with the facts on the plate and you're cooking some crap while thinking you're the master chef.

As for me, I own both AMD and Intel, and the only reason I go with AMD all of the time is due to lower budgets and/or friends wreck their computers and I get to fix and keep.

Would I go with an Intel-based rig if I had the money? Certainly.

Do I recommend AMD to people just as much as I recommend Intel? Always.

The only real fanboy here is you with your ignorance.

 

[MxPhenom 216]

Wow, I have never seen a dead horse get beat so bad.

 

[64K]

Shambles1980, it seems to me that if it weren't an 8 core processor then Intel would be all over AMD for being dishonest and selling them as 8 core CPUs.

 

[Vario]

Amazing how things have changed in the past couple years:

AMD and Intel currently have divergent views on how to architect a quad-core desktop processor. Intel's quad-core parts - for desktop systems as well as servers - are based on a pair of dual-core chips put together on a single substrate - an arrangement know as a multi-chip module (MCM). The quad-core processors are equipped with either 8MiB or 12MiB L2 cache - 4MiB/6MiB per chip - and accessed via a common front-side bus (FSB) whose bandwidth is currently limited to 10.6GiB/s (1333MHz).

Cache contention and access latency can be problematic with four cores potentially thrashing away and requiring data to be streamed from main memory through a discrete memory-controller hub (MCH) on the motherboard, via the FSB. However MCM has benefits of its own. First, the time to market is reduced and that's contributed to Intel's one-year lead over AMD in desktop quad-core x86 processors. In addition, each dual-core assembly is smaller that a quad-core, so yields are improved and costs reduced.

AMD on the other hand reckons that 'native' quad-core is the way to go - using a monolithic piece of silicon to house all four cores, cache, and, of course, integrated memory-controller.

http://hexus.net/tech/reviews/cpu/1...henom-9600-vs-intel-core-2-quad-q6600/?page=2

The basic building block of Bulldozer is the dual-core module, pictured below. AMD wanted better performance than simple SMT (ala Hyper Threading) would allow but without resorting to full duplication of resources we get in a traditional dual core CPU. The result is a duplication of integer execution resources and L1 caches, but a sharing of the front end and FPU. AMD still refers to this module as being dual-core, although it's a departure from the more traditional definition of the word. In the early days of multi-core x86 processors, dual-core designs were simply two single core processors stuck on the same package. Today we still see simple duplication of identical cores in a single processor, but moving forward it's likely that we'll see more heterogenous multi-core systems. AMD's Bulldozer architecture may be unusual, but it challenges the conventional definition of a core in a way that we're probably going to face one way or another in the not too distant future.

The bigger issue with Bulldozer isn't one of core semantics, but rather how threads get scheduled on those cores. Ideally, threads with shared data sets would get scheduled on the same module, while threads that share no data would be scheduled on separate modules. The former allows more efficient use of a module's L2 cache, while the latter guarantees each thread has access to all of a module's resources when there's no tangible benefit to sharing.

This ideal scenario isn't how threads are scheduled on Bulldozer today. Instead of intelligent core/module scheduling based on the memory addresses touched by a thread, Windows 7 currently just schedules threads on Bulldozer in order. Starting from core 0 and going up to core 7 in an eight-core FX-8150, Windows 7 will schedule two threads on the first module, then move to the next module, etc... If the threads happen to be working on the same data, then Windows 7's scheduling approach makes sense. If the threads scheduled are working on different data sets however, Windows 7's current treatment of Bulldozer is suboptimal.

http://www.anandtech.com/show/5448/the-bulldozer-scheduling-patch-tested

Lesson: the definition of a core is pure marketing. AMD says it has 8 cores so it has 8 cores. An AMD FX core is different from an Intel core, different from a core 2 mcm core, and is different from a K10 core. However that doesn't make it not a core.

 

[HalfAHertz]

Shambles I think you need to look at the problem from another angle. AMD's Bulldozer design was ingenious because it tried to revolutionize the way a CPU works. Their goal was to make a more efficient processor. To do that they dissected a core to its basic components and asked the question "What are the most heavily used parts of the core?". They decided to beef up only those parts and share the rest of the components so that they keep utilization to 100% and not have parts of the core sitting idly. That way thy could have a smaller footprint and cheaper design that could be more efficient. Now you have to understand that when so many complex functions happen in 1/1000000 of a second, it's very hard to do simple things like scheduling, prefetching, thread aligning and so on, so the fact that AMD actually made it work with so many shared resources is nothing short of a miracle.

The only problem is that they optimized it only for certain workflows. And it looks that AMD did not choose those workflows carefully enough. Still if you look at reviews and see benchmarks for file or video compression or image and video rendering, you'd see that those silly modules of theirs actually manage to keep up with the i5s and the i7s, even tho Intel's CPUs are produced on a much more advanced process node and pack more transistors.

The other thing is that Intel's HT actually parks one thread mid flight when it reaches a decoder that needs more than 1 cycle to finish the task and picks up another thread that can run on a different decoder along the pipeline. So even tho Intel has done an amazing job and manages to switch threads mid flight almost instantly, HT still introduces some minute latencies. AMD's design on the other hand can have the two threads run in parallel on the same module because each of those integer units has its own dedicated decoders. The only problem is that because their core is weaker, it's not fast enough to see any benefits.
They're both trying to solve the same problem of more efficient multi-threading in two different ways but because Intel has a better micro-architecture and better manufacturing facilities their SMT design seems better even tho it's not.

 

[Tatty_Two]

I think this thread has run it's course and has now turned into a chat room full of inaccuracies and misinterpretation, and therefore is closed.