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Meta Announces New MTIA AI Accelerator with Improved Performance to Ease NVIDIA's Grip

Meta has announced the next generation of its Meta Training and Inference Accelerator (MTIA) chip, which is designed to train and infer AI models at scale. The newest MTIA chip is a second-generation design of Meta's custom silicon for AI, and it is being built on TSMC's 5 nm technology. Running at the frequency of 1.35 GHz, the new chip is getting a boost to 90 Watts of TDP per package compared to just 25 Watts for the first-generation design. Basic Linear Algebra Subprograms (BLAS) processing is where the chip shines, and it includes matrix multiplication and vector/SIMD processing. At GEMM matrix processing, each chip can process 708 TeraFLOPS at INT8 (presumably meant FP8 in the spec) with sparsity, 354 TeraFLOPS without, 354 TeraFLOPS at FP16/BF16 with sparsity, and 177 TeraFLOPS without.

Classical vector and processing is a bit slower at 11.06 TeraFLOPS at INT8 (FP8), 5.53 TeraFLOPS at FP16/BF16, and 2.76 TFLOPS single-precision FP32. The MTIA chip is specifically designed to run AI training and inference on Meta's PyTorch AI framework, with an open-source Triton backend that produces compiler code for optimal performance. Meta uses this for all its Llama models, and with Llama3 just around the corner, it could be trained on these chips. To package it into a system, Meta puts two of these chips onto a board and pairs them with 128 GB of LPDDR5 memory. The board is connected via PCIe Gen 5 to a system where 12 boards are stacked densely. This process is repeated six times in a single rack for 72 boards and 144 chips in a single rack for a total of 101.95 PetaFLOPS, assuming linear scaling at INT8 (FP8) precision. Of course, linear scaling is not quite possible in scale-out systems, which could bring it down to under 100 PetaFLOPS per rack.
Below, you can see images of the chip floorplan, specifications compared to the prior version, as well as the system.

MediaTek Licenses NVIDIA GPU IP for AI-Enhanced Vehicle Processors

NVIDIA has been offering its GPU IP for more than a decade now ever since the introduction of Kepler uArch, and its IP has had relatively low traction in other SoCs. However, that trend seems to be reaching an inflection point as NVIDIA has given MediaTek a license to use its GPU IP to produce the next generation of processors for the auto industry. The newest MediaTek Dimensity Auto Cockpit family consists of CX-1, CY-1, CM-1, and CV-1, where the CX-1 targets premium vehicles, CM targets medium range, and CV targets lower-end vehicles, probably divided by their compute capabilities. The Dimensity Auto Cockpit family is brimming with the latest technology, as the processor core of choice is an Armv9-based design paired with "next-generation" NVIDIA GPU IP, possibly referring to Blackwell, capable of doing ray tracing and DLSS 3, powered by RTX and DLA.

The SoC is supposed to integrate a lot of technology to lower BOM costs of auto manufacturing, and it includes silicon for controlling displays, cameras (advanced HDR ISP), audio streams (multiple audio DSPs), and connectivity (WiFi networking). Interestingly, the SKUs can play movies with AI-enhanced video and support AAA gaming. MediaTek touts the Dimensity Auto Cockpit family with fully local AI processing capabilities, without requiring assistance from outside servers via WiFi, and 3D spatial sensing with driver and occupant monitoring, gaze-aware UI, and natural controls. All of that fits into an SoC fabricated at TSMC's fab on a 3 nm process and runs on the industry-established NVIDIA DRIVE OS.

Silicon Box Announces $3.6 Billion Foundry Deal - New Facility Marked for Northern Italy

Silicon Box, a cutting-edge, advanced panel-level packaging foundry announced its intention to collaborate with the Italian government to invest up to $3.6 billion (€3.2 billion) in Northern Italy, as the site of a new, state-of-the-art semiconductor assembly and test facility. This facility will help meet critical demand for advanced packaging capacity to enable next generation technologies that Silicon Box anticipates by 2028. The multi-year investment will replicate Silicon Box's flagship foundry in Singapore which has proven capability and capacity for the world's most advanced semiconductor packaging solutions, then expand further into 3D integration and testing. When completed, the new facility will support approximately 1,600 Silicon Box employees in Italy. The construction of the facility is also expected to create several thousand more jobs, including eventual hiring by suppliers. Design and planning for the facility will begin immediately, with construction to commence pending European Commission approval of planned financial support by the Italian State.

As well as bringing the most advanced chiplet integration, packaging, and testing to Italy, Silicon Box's manufacturing process is based on panel-level-production; a world leading, first-of-its-kind combination that is already shipping product to customers from its Singapore foundry. Through the investment, Silicon Box has plans for greater innovation and expansion in Europe, and globally. The new integrated production facility is expected to serve as a catalyst for broader ecosystem investments and innovation in Italy, as well as the rest of the European Union.

Microsoft DirectSR Super Resolution API Brings Together DLSS, FSR and XeSS

Microsoft has just announced that their new DirectSR Super Resolution API for DirectX will provide a unified interface for developers to implement super resolution in their games. This means that game studios no longer have to choose between DLSS, FSR, XeSS, or spend additional resources to implement, bug-test and support multiple upscalers. For gamers this is huge news, too, because they will be able to run upscaling in all DirectSR games—no matter the hardware they own. While AMD FSR and Intel XeSS run on all GPUs from all vendors, NVIDIA DLSS is exclusive to Team Green's hardware. With their post, Microsoft also confirms that DirectSR will not replace FSR/DLSS/XeSS with a new upscaler by Microsoft, rather that it builds on existing technologies that are already available, unifying access to them.

While we have to wait until March 21 for more details to be revealed at GDC 2024, Microsoft's Joshua Tucker stated in a blog post: "We're thrilled to announce DirectSR, our new API designed in partnership with GPU hardware vendors to enable seamless integration of Super Resolution (SR) into the next generation of games. Super Resolution is a cutting-edge technique that increases the resolution and visual quality in games. DirectSR is the missing link developers have been waiting for when approaching SR integration, providing a smoother, more efficient experience that scales across hardware. This API enables multi-vendor SR through a common set of inputs and outputs, allowing a single code path to activate a variety of solutions including NVIDIA DLSS Super Resolution, AMD FidelityFX Super Resolution, and Intel XeSS. DirectSR will be available soon in the Agility SDK as a public preview, which will enable developers to test it out and provide feedback. Don't miss our DirectX State of the Union at GDC to catch a sneak peek at how DirectSR can be used with your games!"

Samsung Reportedly Working on Backside Power Supply Tech with 2 Nanometer Process

Samsung and ARM announced a collaborative project last week—the partners are aiming to deliver an "optimized next generation Arm Cortex -X CPU" developed on the latest Gate-All-Around (GAA) process technology. Semiconductor industry watchdogs believe that Samsung Foundry's 3 nm GAA process did not meet sales expectations—reports suggest that many clients decided to pursue advanced three nanometer service options chez TSMC. The South Korean multinational manufacturing conglomerate is setting its sights forward—with an in-progress SF2 GAAFET process in the pipeline—industry insiders reckon that Samsung leadership is hoping to score a major victory within this next-gen market segment.

Lately, important industry figures have been hyping up Backside Power Supply Delivery Network (BSPDN) technology—recent Intel Foundry Services (IFS) press material lays claim to several technological innovations. A prime example being an ambitious five-nodes-in-four-years (5N4Y) process roadmap that: "remains on track and will deliver the industry's first backside power solution." A Chosun Business report proposes that Samsung is working on Backside Power Supply designs—a possible "game changer" when combined with in-house 2 nm SF2 GAAFET. Early experiments, allegedly, involving two unidentified ARM cores have exceeded expectations—according to Chosun's sources, engineers were able to: "reduce the chip area by 10% and 19%, respectively, and succeeded in improving chip performance and frequency efficiency to a single-digit level." Samsung Foundry could be adjusting its mass production timetables, based on freshly reported technological breakthroughs—SF2 GAAFET + BSPDN designs could arrive before the original targeted year of 2027. Prior to the latest developments, Samsung's BSPDN tech was linked to a futuristic 1.7 nm line.

Qualcomm AI Hub Introduced at MWC 2024

Qualcomm Technologies, Inc. unveiled its latest advancements in artificial intelligence (AI) at Mobile World Congress (MWC) Barcelona. From the new Qualcomm AI Hub, to cutting-edge research breakthroughs and a display of commercial AI-enabled devices, Qualcomm Technologies is empowering developers and revolutionizing user experiences across a wide range of devices powered by Snapdragon and Qualcomm platforms.

"With Snapdragon 8 Gen 3 for smartphones and Snapdragon X Elite for PCs, we sparked commercialization of on-device AI at scale. Now with the Qualcomm AI Hub, we will empower developers to fully harness the potential of these cutting-edge technologies and create captivating AI-enabled apps," said Durga Malladi, senior vice president and general manager, technology planning and edge solutions, Qualcomm Technologies, Inc. "The Qualcomm AI Hub provides developers with a comprehensive AI model library to quickly and easily integrate pre-optimized AI models into their applications, leading to faster, more reliable and private user experiences."

Fibocom Intros MediaTek-powered 5G RedCap Module FM330

Fibocom, a global leading provider of IoT (Internet of Things) wireless solutions and wireless communication modules, launches a new series of 5G RedCap module integrated with MediaTek's T300 5G modem, which is the world's first 6 nm radio frequency system-on-chip (RFSOC) single die solution for 5G RedCap. By integrating a single-core Arm Cortex-A3 processor in a significantly compact PCB area, the FM330 series are optimal solutions that offer extended coverage, increased network efficiency and device battery life for industry customers.

Compliant with 3GPP R17 standards, the FM330 series supports mainstream 5G frequency bands worldwide and is capable of reaching a maximum bandwidth of 20 MHz, thus ensuring the peak data rate of up to 227 Mbps downlink and 122 Mbps uplink, sufficient to meet the demand for 5G applications with less data throughput while balancing the power efficiency. In hardware design, it adopts the M.2form factor measured at 30x42mm benefiting from the unique RFSOC solution integrated with T300, in addition to the optimized antenna design in 1T2R, which significantly saves the PCB area. Moreover, FM330 series is pin-compatible with Fibocom LTE Cat 6 module FM101, easing the concerns for customers' migration from 4G to 5G. Furthermore, the module provides 64QAM/256QAM (optional) modulation scheme to greatly optimize the cost and size.

Intel CEO Discloses TSMC Production Details: N3 for Arrow Lake & N3B for Lunar Lake

Intel CEO Pat Gelsinger engaged with press/media representatives following the conclusion of his IFS Direct Connect 2024 keynote speech—when asked about Team Blue's ongoing relationship with TSMC, he confirmed that their manufacturing agreement has advanced from "5 nm to 3 nm." According to a China Times news article: "Gelsinger also confirmed the expansion of orders to TSMC, confirming that TSMC will hold orders for Intel's Arrow and Lunar Lake CPU, GPU, and NPU chips this year, and will produce them using the N3B process, officially ushering in the Intel notebook platform that the outside world has been waiting for many years." Past leaks have indicated that Intel's Arrow Lake processor family will have CPU tiles based on their in-house 20A process, while TSMC takes care of the GPU tile aspect with their 3 nm N3 process node.

That generation is expected to launch later this year—the now "officially confirmed" upgrade to 3 nm should produce pleasing performance and efficiency improvements. The current crop of Core Ultra "Meteor Lake" mobile processors has struggled with the latter, especially when compared to rivals. Lunar Lake is marked down for a 2025 launch window, so some aspects of its internal workings remain a mystery—Gelsinger has confirmed that TSMC's N3B is in the picture, but no official source has disclosed their in-house manufacturing choice(s) for LNL chips. Wccftech believes that Lunar Lake will: "utilize the same P-Core (Lion Cove) and brand-new E-Core (Skymont) core architecture which are expected to be fabricated on the 20A node. But that might also be limited to the CPU tile. The GPU tile will be a significant upgrade over the Meteor Lake and Arrow Lake CPUs since Lunar Lake ditches Alchemist and goes for the next-gen graphics architecture codenamed "Battlemage" (AKA Xe2-LPG)." Late January whispers pointed to Intel and TSMC partnering up on a 2 nanometer process for the "Nova Lake" processor generation—perhaps a very distant prospect (2026).

Arm Launches Next-Generation Neoverse CSS V3 and N3 Designs for Cloud, HPC, and AI Acceleration

Last year, Arm introduced its Neoverse Compute Subsystem (CSS) for the N2 and V2 series of data center processors, providing a reference platform for the development of efficient Arm-based chips. Major cloud service providers like AWS with Graviton 4 and Trainuium 2, Microsoft with Cobalt 100 and Maia 100, and even NVIDIA with Grace CPU and Bluefield DPUs are already utilizing custom Arm server CPU and accelerator designs based on the CSS foundation in their data centers. The CSS allows hyperscalers to optimize Arm processor designs specifically for their workloads, focusing on efficiency rather than outright performance. Today, Arm has unveiled the next generation CSS N3 and V3 for even greater efficiency and AI inferencing capabilities. The N3 design provides up to 32 high-efficiency cores per die with improved branch prediction and larger caches to boost AI performance by 196%, while the V3 design scales up to 64 cores and is 50% faster overall than previous generations.

Both the N3 and V3 leverage advanced features like DDR5, PCIe 5.0, CXL 3.0, and chiplet architecture, continuing Arm's push to make chiplets the standard for data center and cloud architectures. The chiplet approach enables customers to connect their own accelerators and other chiplets to the Arm cores via UCIe interfaces, reducing costs and time-to-market. Looking ahead, Arm has a clear roadmap for its Neoverse platform. The upcoming CSS V4 "Adonis" and N4 "Dionysus" designs will build on the improvements in the N3 and V3, advancing Arm's goal of greater efficiency and performance using optimized chiplet architectures. As more major data center operators introduce custom Arm-based designs, the Neoverse CSS aims to provide a flexible, efficient foundation to power the next generation of cloud computing.

SoftBank Founder Wants $100 Billion to Compete with NVIDIA's AI

Japanese tech billionaire and founder of the SoftBank Group, Masayoshi Son, is embarking on a hugely ambitious new project to build an AI chip company that aims to rival NVIDIA, the current leader in AI semiconductor solutions. Codenamed "Izanagi" after the Japanese god of creation, Son aims to raise up to $100 billion in funding for the new venture. With his company SoftBank having recently scaled back investments in startups, Son is now setting his sights on the red-hot AI chip sector. Izanagi would leverage SoftBank's existing chip design firm, Arm, to develop advanced semiconductors tailored for artificial intelligence computing. The startup would use Arm's instruction set for the chip's processing elements. This could pit Izanagi directly against NVIDIA's leadership position in AI chips. Son has a chest of $41 billion in cash at SoftBank that he can deploy for Izanagi.

Additionally, he is courting sovereign wealth funds in the Middle East to contribute up to $70 billion in additional capital. In total, Son may be seeking up to $100 billion to bankroll Izanagi into a chip powerhouse. AI chips are seeing surging demand as machine learning and neural networks require specialized semiconductors that can process massive datasets. NVIDIA and other names like Intel, AMD, and select startups have capitalized on this trend. However, Son believes the market has room for another major player. Izanagi would focus squarely on developing bleeding-edge AI chip architectures to power the next generation of artificial intelligence applications. It is still unclear if this would be an AI training or AI inference project, but given that the training market is currently bigger as we are in the early buildout phase of AI infrastructure, the consensus might settle on training. With his track record of bold bets, Son is aiming very high with Izanagi. It's a hugely ambitious goal, but Son has defied expectations before. Project Izanagi will test the limits of even his vision and financial firepower.

Lenovo Reportedly Showcasing Prototype Transparent OLED Notebook at MWC 2024

Attention is now turning to the late February Mobile World Congress (WWC) 2024 trade show—following journos recovering from their recent CES gauntlet-esque ordeals. An exclusive Windows Report piece proposes that Lenovo representatives will be heading to Barcelona with a very special next generation laptop in hand. The publication has a outed a number of upcoming portable devices, two weeks prior to Lenovo's intended showcase (February 26 - 29)—we witnessed a similar occurrence last year with WinFuture leaking Microsoft's September Surface refreshes. Six notebook refreshes (ThinkPad and ThinkBook) are mentioned in the latest report, as well as Gen 2 version of Lenovo's ThinkVision M14T portable monitor.

The alleged headliner seems to be a concept model, that slides into the company's ThinkBook range—Windows Report has leaked heavily watermarked images, but little in the way of technical specifications: "Lenovo's transparent laptop features a bezel-less design, with the display being completely see-through. The deck also seems completely transparent, with the main components being housed in and under the chin, which is the area that's not transparent. There's also a non-transparent slim frame that surrounds the entire deck, probably housing the ports." An anonymous source reckons that the transparent OLED ThinkBook runs on Windows 11, and Lenovo's tried and trusted design language is very apparent (when in use).

Hafnia Material Breakthrough Paves Way for Ferroelectric Computer Memory

Scientists and engineers have been experimenting with hafnium oxide over the past decade—many believe that this "elusive ferroelectric material" is best leveraged in next generation computing memory (due to its non-volatile properties), although this requires a major scientific breakthrough to get working in a practical manner. Hafnia's natural state is inherently non-ferroelectric, so it takes some effort to get it into a suitable state—a SciTechDaily article explores past efforts: "Scientists could only get hafnia to its metastable ferroelectric state when straining it as a thin, two-dimensional film of nanometer thickness." Research teams at the University of Rochester, New York and University of Tennessee, Knoxville have presented evidence of an exciting landmark development. Sobhit Singh, assistant professor at UoR's Department of Mechanical Engineering, believes that the joint effort has created a lane for the creation of bulk ferroelectric and antiferroelectric hafnia.

His "Proceedings of the National Academy of Sciences" study proposes an alternative material path: "Hafnia is a very exciting material because of its practical applications in computer technology, especially for data storage. Currently, to store data we use magnetic forms of memory that are slow, require a lot of energy to operate, and are not very efficient. Ferroelectric forms of memory are robust, ultra-fast, cheaper to produce, and more energy-efficient." Professor Janice Musfeldt's team at the University of Tennessee have managed to produce a ferroelectric form of hafnia—through an experimental high pressure process, based on Singh's exact calculations. The material remained in a metastable phase post-experiment, even in a pressure-relieved state. Musfeldt commented on the pleasing results: "This is as an excellent example of experimental-theoretical collaboration." Memory manufacturers are likely keeping an eye on Hafnia's breakthrough potential, but material costs are dampening expectations—Tom's Hardware cites shortages (going back to early 2023): "Hafnium (the key component in Hafnia) has seen a nearly fivefold price increase due to increased demand since 2021, raising its cost from about $1,000 per kilogram to about $5,000. Even at $1000 a kilogram, though, hafnium is by far more expensive than silicon, which measures in the tens of dollars per kilogram."

Latest AMD Linux Graphics Driver Patches Linked to "RDNA 4"

Phoronix head honcho, Michael Larabel, has noticed another set of interesting updates for AMD Graphics on Linux—albeit in preparation for next generation solutions: "engineers on Monday (February 5) posted a few new patch series for enabling some updated IP (intellectual property) blocks within their open-source AMDGPU Linux kernel graphics driver. This new IP is presumably part of the ongoing hardware enablement work for their next-gen RDNA 4 graphics." Team Red GitHub patches for "GFX12" targets appeared online last November, again highlighted by Larabel's investigative work—AMD engineers appear to be quite determined with their open-source software endeavors, as seen in LLVM-Project notes regarding GFX1200's enablement.

The new "IP block" updates included patches for the enabling ATHUB 4.1, LSDMA 7.0, IH 7.0, and HDP 7.0—presumably for next generation Radeon graphics solutions. Larabel provided a quick breakdown of these components: "ATHUB 4.1 is needed for clock-gating / power management features, LSDMA 7.0 is the latest IP for Light SDMA for general purpose System DMA (SDMA) on the GPU, IH 7.0 for the Interrupt Handler on the GPU, and HDP 7.0 for the Host Data Path support for CPU accessing the GPU device memory via the PCI BAR. As far as code changes, the big chunks of the work are from the auto-generated header files." He believes that AMD's engineers have largely moved on from current generation tasks: "The big version bumps for these IP blocks all the more are likely indicative of these bits being for next-gen RDNA 4 as opposed to further iterating on RDNA3 or similar." The patches could be merged into the upcoming Linux 6.9 release, possibly coinciding with a Radeon RX 8000 series rollout.

Qualcomm Appoints Akash Palkhiwala as CFO and COO

Qualcomm Incorporated has announced the appointment of Akash Palkhiwala to the expanded role of Chief Financial Officer and Chief Operating Officer. In addition to his CFO responsibilities, as COO, he will now have oversight for the global go-to-market organization and operations, and IT. Palkhiwala's appointment will be effective immediately and he will continue to report directly to Cristiano Amon, President and CEO of Qualcomm Incorporated. "I'm pleased to expand Akash's CFO role to include that of Chief Operating Officer as Qualcomm executes on its growth and diversification strategy," said Cristiano Amon, president and CEO of Qualcomm. "Akash has played a key role in the execution of our business strategy as Qualcomm has expanded into new end markets, and is ideally positioned to further align the company's operations to capture future growth opportunities. I am thrilled to congratulate Akash on this expanded role."

Palkhiwala has served as Chief Financial Officer since 2019. Previously, he was Senior Vice President and finance lead for QCT, Qualcomm's semiconductor business. Palkhiwala joined Qualcomm in 2001, and during this time has held several finance leadership roles including Treasurer, Financial Planning & Analysis, and Corporate Development. Palkhiwala holds an undergraduate degree in Mechanical Engineering from L.D. College of Engineering in India and an M.B.A from the University of Maryland.

Intel "Panther Lake" Targets Substantial AI Performance Leap in 2025

Pat Gelsinger, CEO of Intel Corporation, has outlined future performance expectations for the company's Core range of processors. In a recent fourth quarter 2023 earnings call he declared: "The Core Ultra platform delivers leadership AI performance today with our next-generation platforms launching later this year, Lunar Lake and Arrow Lake tripling our AI performance. In 2025 with Panther Lake, we will grow AI performance up to an additional 2x." Team Blue's Intel Core Ultra "Meteor Lake" mobile processors arrived right at the tail end of last year, as a somewhat delayed answer to AMD's Ryzen 7040 "Phoenix" APU series—both leveraging their own AI-crunching NPU technologies. Gelsinger believes that the launch of Lunar Lake and Arrow Lake Core product lines will bring significant (3x) AI processing improvements over Meteor Lake. He seemed to confident in a delay-free release schedule for the new year and beyond: "We are first in the industry to have incorporated both gate-all-around and backside power delivery in a single process node, the latter unexpected two years ahead of our competition. Arrow Lake, our lead Intel 20A vehicle will launch this year."

He proceeded to gush about their next node advancement: "Intel 18A is expected to achieve manufacturing readiness in second half 2024, completing our five nodes in four year journey and bringing us back to process leadership. I am pleased to say that Clearwater Forest, our first Intel 18A part for servers has already gone into fab and Panther Lake for clients will be heading into Fab shortly." Industry experts posit that Core "Panther Lake" parts could borrow elements from the next generation Xeon "Clearwater Forest" efficiency-focused family—possibly the latter's "Darkmont" E-cores, to accompany "Cougar Cove" P-cores. The Intel CEO is quite excited about the manufacturing outlay for 2025: "I'll just say, hey, we look at this every single day and we're scrutinizing carefully our progress on 18A. And obviously the great news that we just described those Clearwater Forest taping out, that gives us a lot of confidence that 18A is healthy. That's a major product for us. Panther Lake following that shortly."

Tipster Claims AMD "Kraken Point" APU Configured with Zen 5 & Zen 5c Cores

Everest (@Olrak29_) has kept track of many AMD processor families over the past couple of years—his latest insight provides an early look at the alleged internal makeup of Team Red's "Kraken Point" APU series. The rumor mill has designated these next-gen mobile processors as 2025 follow-ups to the recently launched Ryzen 8040 "Hawk Point" family of mainstream laptop APUs. The tipster's initial social media post only mentioned the presence of both Zen 5 and Zen 5c cores within Kraken Point processors, but he later clarified that a total of eight cores would include four large units and four smaller types. TPU's past coverage of Kraken Point pointed to rumors of an 8-core, 16-thread configuration, but leaked slides (from late 2023) did not mention the integration of efficiency-tuned Zen 5c "Prometheus" cores, along with presumed Zen 5 "Nirvana" cores.

Everest's continuous flow of insider information reveals that "Kraken Point" shares many "Hawk Point" traits—four workgroup processors (WGP) could be present on final retail products, granting eight compute units (8 CUs in total). He responded to a query regarding AMD's choice of integrated graphics technology—the succinct answer being RDNA 3.5. Past leaks allege that XDNA 2 will drive the NPU side of things—offering a performance range of around 45 to 50 TOPS. The Kraken Point APU is believed to be sticking with a safe monolithic die design, manufactured on a non-specific 4 nm process. Team Red is rumored to be in TSMC's order books for all sorts of next generation silicon.

Xbox & ESA Partner on Starfield Space Suit Design Competition

Starfield is the first new universe in over 25 years from the award-winning creators behind Skyrim and Fallout 4, Bethesda Game Studios. Gamers from around the world were excited to jump into this interstellar universe rich with adventure, peril, and excitement. But before anyone hops into space, they need something critical: a spacesuit. So, Xbox has partnered up with the European Space Agency (ESA) to give Starfield fans around the world a chance to win the spacesuit of their dreams, in real life, in addition to other incredible Xbox prizes. This is a physical, wearable, one-of-a-kind garment, fabricated for the most intrepid explorers.

Whether using a provided template as a base, or pushing their imagination to the limit with any creative format of their choice, fans will be asked to provide both a visual illustration of the suit from all sides—hand-drawn, 3D-rendered, or however their vision sees fit—as well as a description of the inspiration of the suit. More specifically, Xbox, Bethesda and the ESA want to know what you would wear in outer space - how would your spacesuit reflect your personal style, individuality and vision for space travel?

HBM Industry Revenue Could Double by 2025 - Growth Driven by Next-gen AI GPUs Cited

Samsung, SK hynix, and Micron are considered to be the top manufacturing sources of High Bandwidth Memory (HBM)—the HBM3 and HBM3E standards are becoming increasingly in demand, due to a widespread deployment of GPUs and accelerators by generative AI companies. Taiwan's Commercial Times proposes that there is an ongoing shortage of HBM components—but this presents a growth opportunity for smaller manufacturers in the region. Naturally, the big name producers are expected to dive in head first with the development of next generation models. The aforementioned financial news article cites research conducted by the Gartner group—they predict that the HBM market will hit an all-time high of $4.976 billion (USD) by 2025.

This estimate is almost double that of projected revenues (just over $2 billion) generated by the HBM market in 2023—the explosive growth of generative AI applications has "boosted" demand for the most performant memory standards. The Commercial Times report states that SK Hynix is the current HBM3E leader, with Micron and Samsung trailing behind—industry experts believe that stragglers will need to "expand HBM production capacity" in order to stay competitive. SK Hynix has shacked up with NVIDIA—the GH200 Grace Hopper platform was unveiled last summer; outfitted with the South Korean firm's HBM3e parts. In a similar timeframe, Samsung was named as AMD's preferred supplier of HBM3 packages—as featured within the recently launched Instinct MI300X accelerator. NVIDIA's HBM3E deal with SK Hynix is believed to extend to the internal makeup of Blackwell GB100 data-center GPUs. The HBM4 memory standard is expected to be the next major battleground for the industry's hardest hitters.

MediaTek Dimensity 9400 SoC Reportedly Queued for TSMC Second-Gen 3 Nanometer Process

MediaTek revealed its (now current generation) flagship Dimensity 9300 flagship mobile processor last November, but we are already hearing about its successor's foundation. Digital Chat Station published some early insights on their Weibo micro-blog—the tipster appears to have an inside track at MediaTek's system-on-chip R&D department. The imaginatively named "Dimensity 9400" chipset is reportedly earmarked for mass production chez TSMC, with the foundry's second generation 3 Nm process being the favored node—this information aligns with official announcements as well as industry rumors from last autumn. MediaTek's Dimensity 9300 sports a "one-of-a-kind All Big Core design," with no provision for puny efficiency units—built on TSMC's third generation 4 nm process with four ARM Cortex-X4 cores (going up to 3.25 GHz) and four Cortex-A720 cores (maximum 2.0 GHz).

Digital Chat Station reckons that the 9300's All Big Core configuration will carryover to its next generation sibling, albeit with some major upgrades. MediaTek hardware engineers are alleged to have selected ARM's latest and greatest CPU and Mali GPU designs—the Cortex-X5 core could be a prime candidate in the first category. The rumor mill has the next batch of flagship Exynos SoCs utilizing ARM's fifth generation design. Digital Chat Station proposes that more smartphone manufacturers could adopt a top-flight Dimensity 2024 chip, if its performance can match the closest rivals. Industry experts posit both MediaTek and Qualcomm choosing TSMC's N3E process for their upcoming flagship chipsets—this node apparently "offers improved cost-effectiveness and superior yields" when compared to the first generation N3B process (as ordered by Apple for its latest M and B-series SoCs). Dimensity 9400 is expected to take on Snapdragon 8 Gen 4—this could be a tough fight, given that Qualcomm's offering is set to debut with custom Oryon cores.

Intel's Next-gen Xeon "Clearwater Forest" E-Core CPU Series Spotted in Patch

Intel presented its next generation Xeon "Clearwater Forest" processor family during September's Innovation Event—their roadmap slide (see below) included other Birch Stream platform architecture options. Earlier this week, Team Blue's software engineers issued a Linux kernel patch that contains details pertaining to codenamed projects: Sierra Forest, Grand Ridge and the aforementioned Clearwater Forest. All E-Core Xeon "Sierra Forest" processors are expected to launch around the middle of 2024—this deployment of purely efficiency-oriented "Sierra Glen" (Atom Crestmont) cores in enterprise/server chip form will be a first for Intel. The Sierra Forest Xeon range has been delayed a couple of times; but some extra maturation time has granted a jump from an initial maximum 144 E-Core count up to 288. The latest patch notes provide an early look into Clearwater Forest's basic foundations—it seems to be Sierra Forest's direct successor.

The Intel Xeon "Granite Rapids" processor family is expected to hit retail just after a Sierra Forest product launch, but the former sports a very different internal configuration—an all "Redwood Cove" P-Core setup. Phoronix posits that Sierra Forest's groundwork is clearing the way for its natural successor: "Clearwater Forest is Intel's second generation E-core Xeon...Clearwater Forest should ship in 2025 while the open-source Intel Linux engineers begin in their driver support preparations and other hardware enablement well in advance of launch. With engineers already pushing Sierra Forest code into the Linux kernel and related key open-source projects like Clang and GCC since last year, their work on enabling Sierra Forest appears to be largely wrapping up and in turn the enablement is to begin for Clearwater Forest. Sent out...was the first Linux kernel patch for Sierra Forest. As usual, for the first patch it's quite basic and is just adding in the new model number for Clearwater Forest CPUs. Clear Water Forest has a model number of 0xDD (221). The patch also reaffirms that the 0xDD Clearwater Forest CPUs are using Atom Darkmont cores."

ASUS Kills Off NUC Extreme Range

ASUS finalized its adoption of the Intel Next Unit of Computing (NUC) product lines at a special autumn 2023 handover event. A post-ceremony statement outlined the company's vision going forward: "ASUS kicked-off its NUC business and started to take orders for NUC 10th to 13th generation systems on September 1. The new business is generating a wide variety of exciting opportunities for the company and the transition has progressed smoothly for NUC customers. The vision of the newly established ASUS NUC BU is to provide the most impactive edge computing with comprehensive commercial and AIoT solutions that can sustain the industry and businesses." Just over a week ago, TechPowerUp was granted access to next generation NUC devices at CES 2024—including ROG NUC, as well as NUC 14 Pro and NUC 14 Pro+ models. Many folks in attendance noticed a complete absence of NUC Extreme products at the ASUS Las Vegas showroom.

Online publication, Fudzilla, has investigated this matter—Fuad Abazovic (Editor-in-Chief) managed to chase down an ASUS spokesperson. It seems that the Taiwanese manufacturer is integrating some if its best known branding into the NUC ecosystem, and Team Blue nomenclature is on the chopping block: "the company won't have an update to the NUC Extreme 7.5 liter device. The Raptor Canyon remains the last NUC of its kind, as ASUS has ROG Strix systems in the same ballpark. Fudzilla already covered the announcement of the NUC and NUC pro, and the ROG NUC. We were assured that the 2.5L ROG NUC will remain the fastest gaming-oriented device and that, at this plan, the company doesn't plan to develop the successor of NUC Extreme 7.5 liter. ASUS has announced ROG Strix G16CHR, its 7.5-liter desktop that comes with an air and water cooler and hosts up to Intel Core i7-14700KF Processor 3.4 GHz (33M Cache, up to 5.5 GHz, 20 cores), NVIDIA GeForce RTX 4080 16 GB GDDR6X 3x DP, 2x HDMI, and up to 64 GB RAM in 4x DDR5 U-DIMM slots."

Paradox Interactive Introduces Prison Architect 2, Breaking Out March 26

Paradox Interactive and Double Eleven have announced Prison Architect 2, the 3D successor to their prison management simulator. The game offers deeper simulation, greater player control, an inhabitant behavior system and creative options to define the next generation of management gameplay. Prison Architect 2 launches on March 26 on Steam, Xbox Series X|S, and PlayStation 5 for a suggested retail price of $39.99 / £34.99 / €39.99. Enterprising Architects can pre-order Prison Architect 2 on PC today.

Prison Architect 2 offers advanced simulation systems, enabling players to construct intricate compounds with a high degree of creative freedom in a 3D environment. From building elaborate structures to managing inmates' needs while maintaining the facility's financial stability, Prison Architect 2 expands gameplay and creative tools across the board, for an engaging sandbox experience. The game also introduces a connection system between the prisoners, who will make friends or enemies with each other, impacting who they will hang out, partner or fight with. Prison Architect 2 brings prison construction and management gameplay to a new level by entering the third dimension and bringing deeper simulation than ever before.

EA Targeting Industry Leading Destruction Effects with Next Battlefield

Electronic Arts in Canada is actively recruiting for a VFX Director position at its Ripple Effect studio—the job listing implies that the ideal candidate will be set to work on the next mainline Battlefield title. EA has implemented a cross-studio development system, where multiple teams have helped to build AAA games, including their controversial plus troubled Battlefield 2042 entry—the popular online shooter series has been steered primarily by DICE in Stockholm, Sweden. Several satellite outfits assisted in producing BF 2042, including Ripple Effect (an "evolution" of DICE LA), but the multiplayer gaming community was disappointed to discover that EA's massive deployment of resources did not result in comprehensive environmental destruction within 2042's gargantuan maps.

Insider Gaming has been keeping tabs on recruitment drives at EA's miscellaneous "Battlefield 6" studios, in order to extract clues about the game's origins and progress. We know very little about the status of BF6, beyond Vince Zampella's declarations from Autumn 2023. His Los Angeles studio appears to be leading the charge; industry insiders believe that DICE Stockholm has been demoted in EA's studio hierarchy. The latest Ripple effect job advert provides a promising insight for Battlefield fans who enjoyed the "Levolution" aspect of Battlefield 4's changing environs: "We are looking for a Senior 3D Artist like you to help us create the most realistic and exciting destruction effects in the industry. You will report to our Art Line Manager, based in our studio in Los Angeles, CA. We are looking for candidates located in Vancouver with remote options." Zampella and Co. are likely having to up the ante, following the launch of "The Finals"—an Unreal 5 engine-powered shooter developed by former DICE veterans. Embark Studios have implemented some impressive destruction effects—serving as a key component of the game's mechanics.

Lexar Exhibits New Portable SSD Models at CES 2024

Lexar previewed part of their CES lineup late last week—we got a quick briefing that outlined various upcoming portable SSDs, M.2 NVMe SSDs, and professional CFExpress cards. TPU staffers spent some quality time at the storage specialist's booth in Las Vegas—they have reported back that emphasis has been placed on Lexar's portable SSD products. The headliner appears to be the prominently placed ARMOR 700 Portable SSD—this boasts an extra rugged design, thus providing the level of on-the-go protection that is required by modern professionals.

The ARMOR 700 will be available in three capacities: 1 TB, 2 TB and 4 TB. Maximum read and write speeds of 2000 MB/s are advertised on Lexar's wall-mounted exhibit, with support for 6K RAW video files. The rugged and durable housing has been certified at IP65, with drop-resistant properties. The already released SL660 BLAZE Gaming Portable SSD was showcased at CES, but it was joined by a similar looking (non-RGB equipped) sibling—the new SL600 is a more sober looking option, aimed at professional types. The SL500 Portable SSD sports credentials for a wide range of purposes: mobile devices, laptops, cameras as well as gaming on current generation games consoles. Lexar states that the SL500 is powered by Silicon Motion Technology portable SSD controllers—with speeds up to 2000 MB/s read and 1800 MB/s write. Capacities noted on the exhibit wall are 1 TB, 2 TB and 4 TB—this applies to the SL600 specification as well.

Five Leading Semiconductor Industry Players Incorporate New Company, Quintauris, to Drive RISC-V Ecosystem Forward

Semiconductor industry players Robert Bosch GmbH, Infineon Technologies AG, Nordic Semiconductor ASA, NXP Semiconductors, and Qualcomm Technologies, Inc., have formally established Quintauris GmbH. Headquartered in Munich, Germany, the company aims to advance the adoption of RISC-V globally by enabling next-generation hardware development.

The formation of Quintauris was formally announced in August, with the aim to be a single source to enable compatible RISC-V-based products, provide reference architectures, and help establish solutions to be widely used across various industries. The initial application focus will be automotive, but with an eventual expansion to include mobile and IoT.
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