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Cadence Announces Tapeout of 14 nm Test-Chip

Cadence Design Systems, Inc., a leader in global electronic design innovation, announced today the tapeout of a 14-nanometer test-chip featuring an ARM Cortex-M0 processor implemented using IBM's FinFET process technology. The successful tapeout is the result of close collaboration between the three technology leaders as they teamed to build an ecosystem to address the new challenges from design through manufacturing inherent in a 14-nanometer FinFET-based design flow.

The 14-nanometer ecosystem and chip are significant milestones of a multi-year agreement between ARM, Cadence and IBM to develop systems-on-chip (SoCs) at the advanced process nodes of 14 nanometers and beyond. SoCs designed at 14 nanometers with FinFET technology offer the promise of a significant reduction in power consumption.

ARM Launches its Smallest, Lowest Power, Most Energy Efficient Cortex-M0 Processor

ARM today announced the ARM Cortex-M0 processor, the smallest, lowest power and most energy-efficient ARM processor available. The exceptional low power, small gate count and code footprint of the processor enables MCU developers to achieve 32-bit performance at an 8-bit price point. The ultra low gate count also enables it to be deployed in analog and mixed signal devices as well as MCU applications, and promises substantial savings in system cost while retaining tool and binary compatibility with the feature-rich Cortex-M3 processor.

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