News Posts matching "PCI-Express 4.0"

Return to Keyword Browsing

Intel 14-nanometer Skylake Platform To Support DDR4, PCIe 4.0, SATA Express

Intel's first chips based on the company's new, and Industry first, 14-nanometer manufacturing process are expected to hit markets in late 2015. With Skylake, Intel will introduce their new 9th-generation Intel HD IGP. The new platform will be the first to bring dual-channel DDR4 memory support. Skylake won't be the first platform to support DDR4 memory. In the 2H of 2014, Intel will launch their enthusiast grade Haswell-E platform, with support for quad-channel DDR4 memory. Skylake will be more of an evolution of Broadwell, which in turn is essentially an die shrink of Haswell to 14nm.

Additionally, the new mainstream platform will bring in support for PCI-E 4.0, essentially doubling the bandwidth offered by the current PCI-E 3.0 standard. More powerful GPUs from NVIDIA and AMD should be able to take advantage of the improved bandwidth, as their cards keep getting more and more powerful with each passing generation. Skylake will also introduce support for SATA Express. The advantage? SATA Express allows for a max bandwidth of about 16 Gb/s, more than 2.5x the 6 Gb/s bandwidth offered by the current SATA standard. While the product slide doesn't specify exactly as to when the first Skylake based products are scheduled to hit the market, our best guess places it at the end of 2015.

Source: PC Games Hardware

PCI-SIG Announces PCI-Express 4.0 Evolution to 16 GT/s, Twice That of PCIe 3.0

PCI-SIG, the organization responsible for the widely adopted PCI Express (PCIe) industry-standard input/output (I/O) technology, today announced the approval of 16 gigatransfers per second (GT/s) as the bit rate for the next generation of PCIe architecture, PCIe 4.0. This decision comes after the PCI-SIG completed a feasibility study on scaling the PCIe interconnect bandwidth to meet the demands of a variety of computing markets.

After technical analysis, the PCI-SIG has determined that 16 GT/s on copper, which will double the bandwidth over the PCIe 3.0 specification, is technically feasible at approximately PCIe 3.0 power levels. The data also confirms that a 16GT/s interconnect can be manufactured in mainstream silicon process technology and can be deployed with existing low-cost materials and infrastructure, while maintaining compatibility with previous generations of PCIe architecture. In addition, the PCI-SIG will investigate advancements in active and idle power optimizations, key issues facing the industry.
Return to Keyword Browsing