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Kingston A400 480 GB (SM2259XT2 + YMTC CDT1B)

480 GB
Capacity
SM2259XT2
Controller
TLC
Flash
SATA 6 Gbps
Interface
2.5"
Form Factor

Multiple hardware versions found.

Performance could vary due to unannounced flash/controller changes.

SSD Controller
Controller
NAND Die
NAND Die
The Kingston A400 is a solid-state drive in the 2.5" form factor, launched on January 11th, 2018. It is only available in the 480 GB capacity listed on this page. With the rest of the system, the Kingston A400 interfaces using a SATA 6 Gbps connection. The SSD controller is the SM2259XT2 from Silicon Motion, a DRAM cache is not available. Kingston has installed 128-layer TLC NAND flash on the A400, the flash chips are made by YMTC. Please note that this SSD is sold in multiple variants with different NAND flash or controller, which could affect performance, the "Notes" section at the end of this page has more info. To improve write speeds, a pseudo-SLC cache is used, so bursts of incoming writes are soaked up more quickly. The A400 is rated for sequential read speeds of up to 500 MB/s and 450 MB/s write; random IOPS reach up to 90K for reads and 35K for writes.
The SSD's price at launch is unknown. The warranty length is set to three years, which is above average, but shorter than the five years offered by many other vendors. Kingston guarantees an endurance rating of 160 TBW, a typical value for consumer SSDs.

Solid-State-Drive

Capacity: 480 GB
Hardware Versions:
Overprovisioning: 65.0 GB / 14.5 %
Production: Active
Released: Jan 11th, 2018
Part Number: SA400S37/480G
Market: Consumer

Physical

Form Factor: 2.5"
Interface: SATA 6 Gbps
Protocol: AHCI
Power Draw: Unknown (Idle)
Unknown (Avg)
1.5 W (Max)

Controller

Manufacturer: Silicon Motion
Name: SM2259XT2
Architecture: ARC 32-bit
Core Count: Single-Core
Frequency: 550 MHz
Foundry: TSMC
Process: 28 nm
Flash Channels: 2 @ 800 MT/s
Chip Enables: 8

NAND Flash

Manufacturer: YMTC
Name: Xtacking 2.0 (CDT1B)
Type: TLC
Technology: 128-layer
Speed: 1600 MT/s
Capacity: Unknown
ONFI: 4.1
Topology: Charge Trap
Die Size: 60 mm²
(8.5 Gbit/mm²)
Planes per Die: 4
Decks per Die: 2
Word Lines: 141 per NAND String
90.8% Vertical Efficiency
Read Time (tR): 50 µs
Program Time (tProg): 620 µs
Block Erase Time (tBERS): 20 ms
Die Read Speed: 1280 MB/s
Die Write Speed: 70 MB/s
Endurance:
(up to)
3000 P/E Cycles
Page Size: 16 KB
Block Size: 2304 Pages
Plane Size: 1980 Blocks

DRAM Cache

Type: None

Performance

Sequential Read: 500 MB/s
Sequential Write: 450 MB/s
Random Read: 90,000 IOPS
Random Write: 35,000 IOPS
Endurance: 160 TBW
Warranty: 3 Years
MTBF: 1.0 Million Hours
Drive Writes Per Day (DWPD): 0.3
SLC Write Cache: Yes

Features

TRIM: Yes
SMART: Yes
Power Loss Protection: No
Encryption:
  • No
RGB Lighting: No
PS5 Compatible: No

Notes

Controller:

Depending on each SSD the controller clock can vary, i've seen it running from 425 MHz up to 550 MHz.

NAND Die:

Read Time (tR): Maximum is 50 µs, typical is lower
Typical Program Time (tPROG): 620 µs
Maximum Program Time (tPROG): Maximum is 910 µs
Block Erase Time (tBERS): Maximum is 20 ms, typical is lower
Array Eficiency of over 92%
YMTC 128L Xtacking 2.0 cell architecture consists of two decks connected through deck-interface buffer layer which is the same process with KIOXIA 112L BiCS 3D NAND structure. Cell size, CSL pitch, and 9-hole VC layouts keep the same design and dimension (horizontal/vertical WL and BL pitches) with previous 64L Xtacking 1.0 cell. Total number of gates is 141 (141T) including selectors and dummy WLs for the TLC operation.
This layout has a 1x 4 Plane layout, each one lineup side by side

Jun 1st, 2024 02:29 EDT change timezone

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