Thursday, December 8th 2011
AMD Radeon HD 7900 ''Tahiti'' Pictured, 384-bit Memory Bus Confirmed?
A Beyond3D forum member posted a mysterious picture of two graphics cards that could very well be engineering samples of AMD's true next-generation Radeon HD 7900 "Tahiti" graphics cards. The final products most probably won't look like these, with a bare red PCB, but it does look like the reference cooler design is ready. A more important feature in that picture is the spotting of traces for at least 11 memory chips, the 12th one (not highlighted) is apparently near the PCIe slot interface. The presence of 12 memory chips gives rumors of Tahiti featuring a 384-bit wide memory interface a shot in the arm. This will be the first AMD GPU in over 5 years to feature a memory bus wider than 256-bit. The R600 Radeon HD 2900 GPU featured a 512-bit GDDR4-capable memory interface.
Sources:
Beyond3D Forums, VR-Zone
117 Comments on AMD Radeon HD 7900 ''Tahiti'' Pictured, 384-bit Memory Bus Confirmed?
All i know is that I have no idea what to expect out of these cards any more. The good thing about that though, is that it makes them all that much more exciting. I can't wait to get one or two!
So I expect an IPC improvement, especially if you consider the stream processor amount hasn't increased by the usual amount you would see from a smaller fab process.
That or they've got some other goodies planned, they always wanted to put side-port *memory on the GPU for example but could never justify the die space requirement on larger fab processes, maybe this is the chips that finally have it.
*
Might of got the name mixed up with something else AMD do, but it's essentially on die memory which would really help with math performance amongst other things.
( or so AMD think)
By the by just to +1 all the ES comments, I doubt pcb will be red, I doubt it will need 2 x 8 pin, they just do that so they can try a wide variety of voltages etc with one ES so they can find the sweet spot etc.
Or, we can wait for reviews. Shouldn't be too long now.
Once the ES card designs are tested stable in some of the most atrocious conditions (overheat, overhumidity, sucky PSU, Furmark, etc.,), they become qualification samples, and are produced in slightly more number to send to ODMs. PCPartner and TUL are the main upstream ODMs, AIB partners buy from them and place their stickers, handle all the shipping/regulation/warranty stuff, and resell.
Think of AMD and component makers as Crude sourcing and shipping companies, ODMs as oil refineries, and AIBs as oil marketing companies.
im thinkin could they not use 256 bit of it for gpu vmem use, and 128 for ioummu, as in 128 bit just for a direct link to memory or something and dunno just thinkin outloud
What's the (new) IOMMU gonna do for us?
Many users, myself included, have found AMD inadequte for Multi-GPU use. Investigating the issue reveals that the AMD CPUs lack enough PCIe-to-System Ram bandwidth via AMD's onboard memory controller. At the same time, AMD's CPUs only use about 65% of the bandwidth the DIMMs they use support. The IOMMU could perhaps take advantage of that 35% of bandwidth left over, and make 3D performance much better on AMD platforms with multiple VGAs.
As well, it could allow VGAs to shared pooled resources in local data caches. In other words, you could have one GPU access data on the other card's memory space, making onboard VGA ram on multiple cards a total space, rather than a duplicated space. For for like the HD6990, it has 4 GB of ram, but only 2GB usable effectively. IOMMU could make it have 4GB of usable space.
Those are possibilities. Until the cards come out, and AMD start talking more about htem, we'll not know for sure what the IOMMU will truly offer. What I can say is that no "consumer" OS other than Linux actually supports IOMMUs, so I remain hesitant to guess what will happen.
And of course the whole thing becomes even more irrelevant fr graphics, when you consider that the new cards will have 3 GB of memory. With so much memory and memory bandwidth to boot, the last thing you wnt to do, is to move data from and to main memory.Where did they say that one GPU can read vram of the other one? Plus why would you want to do that in the first place? It would NOT help graphics performance at all (GPGPU that's another thing). Graphics performance entirely depends on the bandwidth/availability/lag between the GPU and its own vram, controlled by its own memory controller. As long as you move anything from vram to any other memory pool performance can and most probably will degrade.
Although, you may be right, just not on where the bottleneck occurs(probably due to my poor explanation :D). It depends on how the IOMMU interfaces with the CPU memory controller. The bottleneck could simply be occuring beucase of how GART is dealt with. You only have 256 MB of GART space in system ram, which means the contorller is constantly writing to the GART space from system ram due to it's limited size. Allowing for a large buffer size would mean less writes to GART, which can boost performance as the CPU doesn't have to copy from System RAM to GART. Same thing with sharing VGA ram...maybe you should check last year's Fusion Summit presentation and it might give you a better idea.
Anyway, we should be discussing this in the thread created for it. ;)
www.xbitlabs.com/news/memory/display/20090212111407_Samsung_Begins_to_Produce_7GHz_GDDR5_Memory.html
samsungs new gddr5 7GHz capable
and with rumours imho i see a 256 bit memory bus between gfx gpu and mem plus a seperate sideband sort of 128bit iommu bus making what they will call a 384bit bus and more system to gpu bandwith utilised
like i say a 3rd on die DMA maybe 4 in totalAMD have not been shy about makeing drastic marked hardware changes lately take APU's BD and GCN for example all marked changes from that which went before
no facts support this pos bs just speculating
damn too much:pimp:im still pondering the other bit though
Link--> www.geeks3d.com/20111209/amd-radeon-hd-7970-tahiti-xt-pictures-benchmarks/
True or not it seems believable