Friday, February 8th 2019
No AMD Radeon "Navi" Before October: Report
AMD "Navi" is the company's next-generation graphics architecture succeeding "Vega" and will leverage the 7 nm silicon fabrication process. It was originally slated to launch mid-2019, with probable unveiling on the sidelines of Computex (early-June). Cowcotland reports that AMD has delayed its plans to launch "Navi" all the way to October (Q4-2019). The delay probably has something to do with AMD's 7 nm foundry allocation for the year.
AMD is now fully reliant on TSMC to execute its 7 nm product roadmap, which includes its entire 2nd generation EPYC and 3rd generation Ryzen processors based on the "Zen 2" architecture, and to a smaller extent, GPUs based on its 2nd generation "Vega" architecture, such as the recently launched Radeon VII. We expect the first "Navi" discrete GPU to be a lean, fast-moving product that succeeds "Polaris 30." In addition to 7 nm, it could incorporate faster SIMD units, higher clock-speeds, and a relatively cost-effective memory solution, such as GDDR6.
Source:
Cowcotland
AMD is now fully reliant on TSMC to execute its 7 nm product roadmap, which includes its entire 2nd generation EPYC and 3rd generation Ryzen processors based on the "Zen 2" architecture, and to a smaller extent, GPUs based on its 2nd generation "Vega" architecture, such as the recently launched Radeon VII. We expect the first "Navi" discrete GPU to be a lean, fast-moving product that succeeds "Polaris 30." In addition to 7 nm, it could incorporate faster SIMD units, higher clock-speeds, and a relatively cost-effective memory solution, such as GDDR6.
135 Comments on No AMD Radeon "Navi" Before October: Report
Intel tried to push Rambus, AMD stuck with DDR and WON. AMD 1st Dual Core, Tri Core Quad Core 6 Core 8 core etc. 1st on board L2 cache 1st IMC 1st to introduce a high speed HTT interconnect 1st to push industry to 64-Bit etc.
And on and on AMD lead while Intel followed.
For x86 microprocessor innovations, AMD has shown the way as well.
First superscalar RISC - K5
First to use "Flip-Chip" technology - K6
First on-chip L2 cache - K6-3
First use of copper interconnects - K7
First fully pipelined, superscalar floating point unit - K7
First to extend x86 to 64-bits (AMD64) - K8
Regarding specific innovations, while AMD K5 might be a more true RISC processor at its core, Intel also used RISC like micro operations in the superscalar design known as P6. It's also worth mentioning that AMD abandoned their K5 design and bought the successor K6 from another company.
In more recent innovations, I would mention the often overlooked extension to AVX known as FMA3, which has since been fully embraced by Intel.
AMD needs to have a successful commercial 7nm ZEN launch, and ensure they have sufficient 7nm chips. I think that might be one reason Navi is somewhat delayed. Or why there isn't too many Radeon VII 's available.
Amd/comments/9j88gc/_/e6pu7r5
and more here:
www.phoronix.com/forums/forum/linux-graphics-x-org-drivers/open-source-nvidia-linux-nouveau/1056080-red-hat-nvidia-to-collaborate-on-some-open-source-efforts/page4
AMD HAS NOT CONFIRMED THIS
And it's bad* because apparently it cannot catch up to Nvidia, Perf/W is like half of what Nvidia gets, TBR is supposedly in there since Vega, but has never been enabled - which part of what perf/W sucks, need of async to feed the included resources, to name just some of the issues I know of.
* I'm not sure it's bad per se, but it's sure getting long in the tooth.
In other words, AMD needs to trash this design and move onto something Brand Spanking New.
That's where 7nm Navi comes into play. The Navi that's bass on something Brand New which started around 2015.
Also not good for general scientific computing since CUDA and Tensor Flow are the industry standards now for scientific computing.
In the end GCN becomes good for nothing. (Except crypto mining, which has also died)
#GCNMUSTDIENavi is still GCN. Whatever comes after Navi will not the new uArc.
GCN is ISA (instruction set architecture). GCN1.0, 1.1, 1.2... or 1, 2, 3, 4, 5... And there is no reason to kill it. The times of revolutionary changes here are over.
GFX is uArch (microarchitecture that implements ISA). GFX6 aka SI is first GCN implementation (south islands). GFX7 aka CI is second (sea islands). GFX8 aka VI is third (volcanic islands, Tonga, Fuji, Polaris). GFX9 - Vega. GFX10 - Navi. Each new uArch implementation can be simply updated from the previous one or completely new design from scratch.
The PAL has references to GFX10 since June 2018.
:toast:
GCN3=GCN4. Despite lithography update, Tonga and Polaris have identical ISA (GCN1.2) and uArch (GFX8 vs GFX8.1)
GCN 1 = GFX6
GCN 2 = GFX7
GCN 3 = GFX8
GCN 4 = GFX8 w/ "Next-Gen Display Engine" supporting HDMI 2.0, DP 1.3, HDCP 2.2, and PlayReady 3.0.
GCN 5 = GFX9
People were quite disappointed that Fury X/Fiji only supported HDMI 1.4/DP 1.2. It was a card designed for high resolutions yet it couldn't drive a 4K TV>30 Hz because of the Display Engine limitation. Stands to reason that Polaris focused on fixing that which carried over into Vega where it gets used.
No CPU or GPU designs these days are starting from completely scratch, but what I and many other tech guys call a new "architecture" is when there are major changes in the overall design. There will always be grey areas, and of course some larger new architectures that influences succeeding architectures.
Examples for Nvidia:
Tesla (large)
Fermi
Kepler (large)
Maxwell
Volta
Or Intel:
Core (large)
Nehalem (large)
Sandy Bridge (large)
Haswell
Skylake
Sunny Cove (upcoming)
And then we can talk about the legacy Intel brought all the way from P6 to at least Core.
On a different note, this is the same like saying that all intel cpu suck as they still use 40 years old x86 architecture, while we all know there have been multiple improvements to the original architecture.
The same is true for GCN, there have been multiple improvements over the years.