Wednesday, August 7th 2019

AMD Zen 2 EPYC "Rome" Launch Event Live Blog

AMD invited TechPowerUp to their launch event and editor's day coverage of Zen 2 EPYC processors based on the 7 nm process. The event was a day-long affair which included product demos and tours, and capped off with an official launch presentation which we are able to share with you live as the event goes on. Zen 2 with the Ryzen 3000-series processors ushered in a lot of excitement, and for good reason too as our own reviews show, but questions remained on how the platform would scale to the other end of the market. We already knew, for example, that AMD secured many contracts based on their first-generation EPYC processors, and no doubt the IPC increase and expected increased core count would cause similar, if not higher, interest here. We also expect to know shortly about the various SKUs and pricing involved, and also if AMD wants to shed more light on the future of the Threadripper processor family. Read below, and continue past the break, for our live coverage.
21:00 UTC: Lisa Su is on the stage at the Palace of Fine Arts events venue in San Francisco to present AMD's latest developments on EPYC for datacenters, using the Zen 2 microarchitecture.

21:10 UTC: AMD focuses not just on delivering a single chip, but it's goal is to deliver a complete solution for the enterprise.

21:12 UTC: AMD Naples was released two years ago and it served mostly to introduce the technology and to get acquainted with industry and ecosystem partners.

21:17 UTC: AMD is betting big on Zen 2- its biggest bet yet in the server space.
21:20 UTC: According to AMD, they have already broken 80 world records with EPYC on Zen 2, and will show off some of them in this presentation.
21:21 UTC: AMD has more cores than ever, the most IO capability ever.

21:26 UTC: AMD is now comparing the EPYC 7742, a 64-core SKU, against the Intel Xeon Platinum 8280L (28-cores): a 97% higher performance relative to Intel when it comes to the peak SPECrate 2017 floating point test. It also has 4x the floating performance relative to the EPYC 1st generation, presumably the EPYC 7551P (32-cores).
21:30 UTC: It is important for AMD to not only focus on raw performance, but to also drive up performance per dollar and improve OpEx.
21:32 UTC: AMD recognizes it can't do this alone, and has teamed up with OEM partners who use AMD EPYC processors to turn this into full ready-to-go servers.
21:35 UTC: Mark Potter from HPE (Hewlett Packard Enterprise, CTO) is now on stage.
21:36 UTC: HPE has three EPYC-based servers (ProLiant DL325, ProLiant DL385, and Apollo 35) available starting today, and will have 12 different server models within the next 12 months.
21:37 UTC: HPE's new servers have claimed 37 world records. No details on what these are yet, but Mark Potter briefly says these are all in the workload areas that matter in this market, including enterprise virtualization, big data analytics, server-side JAVA, and SAP sales/distribution.
21:40 UTC: Mark is now talking about security, and how HPE has approached it using a zero-trust model. This is, of course, taking a jab at Intel's recent security issues, the latest of which was just revealed in the last days.

21:41 UTC: HPE is confident that it can secure, manage and optimize the system of tomorrow.
21:42 UTC: The company analyzed 1.25 billion data points from various customers and trained an AI with the results to predict possible system failures and mitigate their effects.

21:44 UTC: HPE is delivering the systems the way the customers want it in that they are free to buy them the traditional way, or customers can pay-per-use for their servers without the substantial up-front investments.

21:46 UTC: Next up on stage is Jennifer Fraser of Twitter (Director, Data Center Engineering), talking about how awesome EPYC is in a trend no doubt to follow.
21:47 UTC: EPYC lets Twitter put 40% more cores into each server rack. This helps with a 25% reduction in the total cost of ownership, which will be implemented in Twitter datacenters by the end of 2019.

21:49 UTC: Next up is Mark Papermaster, the CTO of AMD.
21:50 UTC: Mark talks about their journey to high-performance using the Zen microarchitecture. He claims, and we quote here, "we have our Zen 3 designs on track. Our roadmap is stable and we're executing (it)".

21:52 UTC: "You don't get there without making some pretty big bets, and that's exactly what we did. To get those world records you have to make those decisions years in advance." - Mark Papermaster, AMD.

21:54 UTC: Mark recaps how AMD got to today, how the company managed to get the 7 nanometer process working successfully, and how to make the best of said 7 nm process.

21:55 UTC: Server customers, as Mark says, don't need crazy high performance with high power consumption. They are constrained by power delivery to the rack, so AMD doubled the number of cores using the 7 nm manufacturing process, while retaining roughly the same power consumption as their previous generation. "Server customers need more performance per rack in the datacenter" - Mark Papermaster, AMD.

21:57 UTC: Single thread performance always matters, there are a lot of legacy workloads out there. But server workloads typically scale better with more cores relative to that experienced by the average end user in a retail market. A mean IPC increase of 15% (presumably relative to EPYC 1st gen) will help here across the board.

21:58 UTC: We're shifting gears now, talking about architecture: improved branch predictor, doubled cache size, wider integer units and more. "We quadrupled performance per socket, and that's what matters to customers".

22:02 UTC: AMD now uses Infinity Fabric on their entire CPU product portfolio. Mark is now talking about their chiplet architecture which increases efficiency and performance, and lowers latency at the same time.

22:03 UTC: They are pairing a 7 nm CPU die, with a 14 nm I/O die, because the I/O die has a lot of analog circuitry that doesn't scale well with a smaller process size. EPYC on Rome is capable of eight dies with eight cores each, which brings the maximum physical core count to 64. On top of that, you have SMT (AMD's variant of HyperThreading) which doubles the thread count, for a max total of 128 threads per socket.

22:05 UTC: The supported memory speed is now up to 3600 MHz, which ends up with an industry-leading 204 GB/s memory bandwidth when eight memory channels are occupied. The memory frequency is now decoupled from I/O, which adds flexibility for their customers.

22:06 UTC: PCIe Gen 4.0 doubles the bandwidth relative to Gen 3.0, which matters in application performance such as in data storage and networking use cases.

22:08 UTC: You see near perfect scalability, which is very difficult to achieve in a coherent multi-processor system. What's even more impressive is that these performance gains persists even over multiple sockets.

22:10 UTC: Next on stage is Robert Hormuth representing Dell EMC (VP, Fellow, CTO Server infrastructure and Systems).
22:12 UTC: Dell leveraged EPYC to enhance the unique platforms in their portfolio, noting especially how the 160 available lanes of I/O come in useful.
22:14 UTC: Dell will continue to optimize workloads for their customers and take a deep look at how they can use EPYC for that mission.

22:15 UTC: Mark Papermaster is now talking about the security focus at AMD. The company is proud that most of the recent exploits are not applicable to AMD's Zen microarchitecture. In Zen 2 they hardened it further, working together with their partners, taking a strong security and made it stronger.
22:19 UTC: SEV2 in Zen 2 supports up to 509 unique cryptographic keys for virtual machine partitions, which is a huge increase over the 15 that were available in Zen 1st generation. This was driven by the phenomenal demand for virtualization in the industry.

22:20 UTC: Krish Prasad, GM of VMWare's Cloud Platform Business Unit, is now on stage.
22:22 UTC: VMWare will support SEV in upcoming virtualization software releases.
22:24 UTC: "We're here to bring performance to market to help customers solve the most demanding problems out there. Zen 2- it's what we do best at AMD- delivering performance and value. We brought more performance and more cores thanks to 7 nm." - Mark Papermaster, AMD.
22:25 UTC: "We are already working on the next designs. In fact, we completed the design phase of Zen 3, which is right on track. We don't stop there. We already have our engineers working on Zen 4." - Mark Papermaster, AMD.
"We know that it's a highly competitive environment that we're in. For us it's personal, you have our commitment. Thank you very much!" - Mark Papermaster, AMD.

Forrest Norrod (Vice President and General Manager Datacenter & Embedded Solutions, AMD) is on stage now.
22:29 UTC: 32 billion transistors in an EPYC Zen 2 processors. Over half a Gigabyte of cache.
22:31 UTC: EPYC now offers double the performance compared to Intel's offerings.. "disruptive".
22:33 UTC: "You could say it's just numbers on a screen, it's just slides. In a real world, this translates into disruptive economics. Take a look at a typical on-premises retail store. The customer has 60 Intel servers. That same level of performance can be delivered with EPYC using 33 servers." Forrest Norrod, AMD.
22:36 UTC: Peter Ungaro, CEO of Cray, now on stage.
22:37 UTC: Five years ago we started rethinking the datacenter, the workloads and the applications. We came up with an architecture rebuilt from the ground up for the next ten years going forward.

22:40 UTC: Cray is using its own inter-node fabric called "Slingshot". One of the company's projects is a US government exascale supercomputing machine called Frontier, which runs at 1.5 trillion operations per second and will be deployed at the Oak Ridge National Laboratory in 2021. "If you take (the) fastest 100 supercomputers today and combine them today, Frontier will be faster." - Peter Ungaro, Cray.

22:42 UTC: Cray will install new EPYC based super computers with the US Department of Energy. They are also working with the Haas Formula One team, which use an EPYC-based super computer and is seeing 45% performance improvements. Last but not least, Cray (w/AMD) is announcing a new contract with the US Airforce for their weather department.

22:46 UTC: Matt Link from Indiana University (Associate Vice President, UITS Research Technologies) is on stage, looking forward to be the first educational institution to receive a Cray Shasta system named the Big Red 200, which will use AMD EPYC processors.

22:48 UTC: Even single socket servers, which in the past were considered constrained, are now offering much better performance, features and flexibility with EPYC.
22:49 UTC: They are comparing Intel against AMD once more, and EPYC single-socket is a huge winner, more than doubling their competitor's performance in many metrics.

22:51 UTC: "A single-socket EPYC server will outperform many dual-socket Intel servers! You can do same performance, or better with 50% fewer servers, or lower power, or lower licensing costs, if you opt for EPYC single-socket servers." says AMD.

22:53 UTC: Doug Fisher COO & SVP of Lenovo's Data Center Group is on stage.
22:56 UTC: Lenovo emphasizes that their EPYC motherboards are brand-new designs, optimized for EPYC second generation, while other manufacturers reuse existing Naples designs. This might help with stability of PCI-Express Gen 4.0 specifically, which is quite a bit more picky when it comes to lane signal quality.

23:03 UTC: Microsoft's Azure CVP Girish Bablani is on stage now. He talks about their 1st gen EPYC offerings, how good the performance is and how happy the customers are.

23:06 UTC: For 2nd generation EPYC, they see up to 2.3x the HPC performance relative to the previous generation.
23:08 UTC: Microsoft is announcing several new EPYC cloud products as Azure VMs: HBv2 for HPC, Virtual Desktops, Da_v3 for general purpose and Ea_v3 for memory-intensive workloads.

23:09 UTC: AMD has a very simple and straight-forward product stack. Customers can choose the performance they want for their workload. With the EPYC stack, all features are included across all processors, and there are no compromises as compared to Intel's product stack which forces customers to buy the more expensive processor when in need of a specific feature set.
23:12 UTC: For the highest-performance offerings, AMD EPYC offers 4x the performance-per-dollar compared to Intel Xeon. An impressive 400%, for those who prefer percentages!

23:14 UTC: Lisa Su is back on stage to wrap up proceedings.
23:15 UTC: Bart Sano, VP of Engineering from Google, joins her on the stage.

23:16 UTC: Google operates data centers around the world, running highly critical applications that need to run fast and scale well to handle the billions of users all over the globe, while still keeping economic viability a priority.
23:19 UTC: Google is announcing that it has already deployed EPYC 2nd generation in their production datacenters. They are seeing great performance on a variety of workloads thanks to the new architecture, noting especially that PCIe Gen 4.0 helps a lot.
23:21 UTC: Google is also introducing EPYC 2nd generation processors to their cloud users via Google Cloud Engine. These VMs will offer better price/performance than the previous hardware solutions used. This is a massive win for AMD, depending on how big the contract is.

23:23 UTC: AMD is not stopping here, "they are just getting started". Lisa confirms that the Zen 3 design for "Milan" is complete, and that "Genoa", their Zen 4 processor is currently "in design", ready to launch in 2022.

23:24 UTC: Lisa thanks all the attendees, and that concludes the presentation. It would be safe to say that AMD puts on a good show when they have products to back it, and the last few such presentations have been going well- especially when it comes to the CPU space. No word on Threadripper's future here, which no doubt will mean more questions coming up, but AMD needed desperately to gain market space in the x86 server land and EPYC 2nd generation with the list of clients announced today will go a long way in helping achieve that.
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28 Comments on AMD Zen 2 EPYC "Rome" Launch Event Live Blog

#1
lynx29
I didn't realize she was a Doctor of something until I zoomed in on that picture.

Cool. So she has a doctorate in electrical engineering and is CEO, that is actually very cool, I like that business model better than say your CEO just being some corporate shill (looking at Intel). Makes me proud my 3700x just arrived in the mail today.

AMD GLORY DAYS ARE BACK MY BROTHERS!!!! ah, young 15 year old me, installing my ATI AGP graphics card so I could play World of Warcraft beta in 2003-2004... good times, glorious times!!!! so long nvidia and intel! you are no longer a monopoly, take your nvidia telemetry and shove it wooooo! also intel had an another security issue https://www.techradar.com/news/intel-chips-have-another-major-security-flaw

lol... never ending for Intel. privacy and security, AMD baby!!!
Posted on Reply
#3
Xzibit
If you guys want to follow along



you have to put up with seeing Wendell from level1tech in the near seat

Or just watch Wendells stream, He has a clearer picture

Posted on Reply
#4
danbert2000
It is impressive they have some launch partners with massive reach this time around. EPYC processors took a while to get onto server boards last time around but now it's same day launch. Good luck to AMD. We all benefit from better performance in the server area, from lower carbon costs for existing usage levels and lower capital costs for future expansion perhaps leading to lower service and product costs.
Posted on Reply
#5
Vya Domus
One thing that I can say for sure, AMD sure mastered the art of aesthetically pleasing slides.
Posted on Reply
#6
Aquinus
Resident Wat-man
danbert2000, post: 4094204, member: 165365"
It is impressive they have some launch partners with massive reach this time around. EPYC processors took a while to get onto server boards last time around but now it's same day launch. Good luck to AMD. We all benefit from better performance in the server area, from lower carbon costs for existing usage levels and lower capital costs for future expansion perhaps leading to lower service and product costs.
I was impressed when I found out that you can spin up EC2 instances at Amazon on EPYC servers. AMD stands to gain a lot if they're starting to reach into entities like Amazon or Google.
Posted on Reply
#8
VSG
Editor, Reviews & News
PanicLake, post: 4094216, member: 188909"
Is that you W1zzard? :)

I don't think his wizardry extends to taking a photo of himself from behind while simultaneously also writing this, sadly.
Posted on Reply
#9
Fluffmeister
VSG, post: 4094227, member: 150714"
I don't think his wizardry extends to taking a photo of himself from behind while simultaneously also writing this, sadly.
Indeed, now that would be EPYC. (cringy name)
Posted on Reply
#10
PanicLake
VSG, post: 4094227, member: 150714"
I don't think his wizardry extends to taking a photo of himself from behind while simultaneously also writing this, sadly.
It might be the guy on his left... one of the two by the angle of the photos.
Your comment make no sense, think carefully :laugh:
Posted on Reply
#11
phill
Great news, now lets see the reviews :D :D
Posted on Reply
#12
Mamya3084
Sooo, threadripper 3. So glad I got a 2nd motherboard for $140.
Posted on Reply
#13
eidairaman1
The Exiled Airman
Vya Domus, post: 4094209, member: 169281"
One thing that I can say for sure, AMD sure mastered the art of aesthetically pleasing slides.
Aquinus, post: 4094213, member: 102461"
I was impressed when I found out that you can spin up EC2 instances at Amazon on EPYC servers. AMD stands to gain a lot if they're starting to reach into entities like Amazon or Google.
Id like to see Epyc/ threadripper on 1 platform, cpus that are 2 way capable but heavy on ipc.
Posted on Reply
#14
HTC
eidairaman1, post: 4094256, member: 40556"
Id like to see Epyc/ threadripper on 1 platform, cpus that are 2 way capable but heavy on ipc.
Seriously doubt this:

1 - Epyc is octal channel memory while TR is quad channel
2 - Epyc is power save oriented without OC ability while TR is performance oriented with OC ability
3 - Epyc board formats VS TR's: are they the same? Dunno this, really
Posted on Reply
#15
Mamya3084
HTC, post: 4094270, member: 51238"
Seriously doubt this:

1 - Epyc is octal channel memory while TR is quad channel
2 - Epyc is power save oriented without OC ability while TR is performance oriented with OC ability
3 - Epyc board formats VS TR's: are they the same? Dunno this, really
They are essentially the same, as you stated. You lose 8 channel memory, but gain OC ability...unless you are de8auer and have connections.
Posted on Reply
#16
Darksaber
W1zzard's Sidekick
PanicLake, post: 4094216, member: 188909"
Is that you W1zzard? :)

LOL, I laughed hard when I saw that, as I was sitting there at the Keynote. W1zzard isn't actually in San Francisco - just myself and that is def not me. . Sorry :D I was sitting front and center though. Look for the group selfie from Twitter Engineering director ^^ I may be in there
Posted on Reply
#17
yakk
Have to be impressed with all their launch partners, like AMD said in their presentation, That's some EPYC Ass Kicking!
Posted on Reply
#18
eidairaman1
The Exiled Airman
HTC, post: 4094270, member: 51238"
Seriously doubt this:

1 - Epyc is octal channel memory while TR is quad channel
2 - Epyc is power save oriented without OC ability while TR is performance oriented with OC ability
3 - Epyc board formats VS TR's: are they the same? Dunno this, really
Im saying same exact socket and ability to oc across board for users who want to or maintain absolute durability lol.
Posted on Reply
#20
TheGuruStud
Crackong, post: 4094331, member: 185495"
Seriously nobody wants that 400W monstrosity.
400 is generous. Current big chip already consumes 4-500W.
Posted on Reply
#21
Mephis
Very impressive chip. Can't wait to see what they have up their s leaves for Zen 3 and Zen 4.
Posted on Reply
#22
krykry
Mephis, post: 4094363, member: 186806"
Very impressive chip. Can't wait to see what they have up their s leaves for Zen 3 and Zen 4.
At this point I wouldn't be surprised to see some kind of HBM2 or HBM3 (tentative naming) implementation in CPUs. Putting a stack of 4gb of HBM2 or HBM3 to act as L4 cache would give it a good performance kick. Not to mention integrated GPU benefits.
Posted on Reply
#23
Crackong
TheGuruStud, post: 4094344, member: 42692"
400 is generous. Current big chip already consumes 4-500W.
Single Socket PC : Okay
HPC Computing : Nope, just Nope.
Posted on Reply
#24
Imsochobo
Crackong, post: 4094427, member: 185495"
Single Socket PC : Okay
HPC Computing : Nope, just Nope.
Our datacenter will not accept a 2p 56 core cascade lake so as a single socket for the one application with license fee's per socket worse than satan himself.
but then, what's more expensive, license for another socket or the 56 core ? :)


Mamya3084, post: 4094271, member: 186201"
They are essentially the same, as you stated. You lose 8 channel memory, but gain OC ability...unless you are de8auer and have connections.
he didn't have connections, there were just boards that just did it. :)
Posted on Reply
#25
Crackong
Imsochobo, post: 4094445, member: 66457"
Our datacenter will not accept a 2p 56 core cascade lake so as a single socket for the one application with license fee's per socket worse than satan himself.
but then, what's more expensive, license for another socket or the 56 core ? :)
And there should be enough power density to start a nuclear reaction inside :)
Posted on Reply
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