It looks like Intel has decided to adopt the same approach as AMD with the cache structure on its upcoming Nehalem processors, opting to go for small per-core L1 and L2 caches, with a large shared L3 cache. The new architecture will feature 64KB L1 cache per-core working in the same way as current Core 2 CPUs, but instead of a shared L2 cache each core will have 256KB of its own. All of the cores will then have access to a shared L3 cache of up to 8MB. AMD's Phenom CPUs work in a very similar manner, such as the 9600, which has 256KB L2 cache per-core and a shared 2MB L3 cache. The exclusive L2 caches give each core a pool of fast-access memory, while the shared cache acts as a buffer to trap data and instructions other cores may have requested, allowing another core to access it more quickly than using the main memory.