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AMD Socket AM3+
The AMD FX-8120 was a desktop processor with 8 cores, launched in October 2011. It is part of the FX lineup, using the Zambezi architecture with Socket AM3+. FX-8120 has 8MB of L3 cache and operates at 3.1 GHz by default, but can boost up to 4 GHz, depending on the workload. AMD is making the FX-8120 on a 32 nm production node using 1,200 million transistors. You may freely adjust the unlocked multiplier on FX-8120, which simplifies overclocking greatly, as you can easily dial in any overclocking frequency.
With a TDP of 125 W, the FX-8120 consumes a lot of power, so good cooling is definitely needed. AMD's processor supports DDR3 memory with adual-channel interface. For communication with other components in the system, FX-8120 uses a PCI-Express Gen 2 connection. This processor does not have integrated graphics, you will need a separate graphics card.
Hardware virtualization is available on the FX-8120, which greatly improves virtual machine performance. Programs using Advanced Vector Extensions (AVX) can run on this processor, boosting performance for calculation-heavy applications.
Physical
Socket: |
AMD Socket AM3+
|
Process Size: |
32 nm |
Transistors: |
1,200 million |
Die Size: |
315 mm² |
Package: |
µPGA |
Performance
Frequency: |
3.1 GHz |
Turbo Clock: |
up to 4 GHz |
Base Clock: |
200 MHz |
Multiplier: |
15.5x |
Multiplier Unlocked: |
Yes |
Voltage: |
1.425 V |
TDP: |
125 W |
Architecture
Market: |
Desktop |
Production Status: |
End-of-life |
Release Date: |
Oct 12th, 2011 |
Codename: |
Zambezi |
Generation: |
FX
(Zambezi) |
Part#: |
FD8120FRGUBOX FD8120FRW8KGU |
Memory Support: |
DDR3
Dual-channel |
ECC Memory: |
No
|
PCI-Express: |
Gen 2 |
Cores
# of Cores: |
8 |
# of Threads: |
8 |
SMP # CPUs: |
1 |
Integrated Graphics: |
N/A |
Cache
Cache L1: |
384K |
Cache L2: |
8MB |
Cache L3: |
8MB (shared) |
Features
- MMX
- SSE
- SSE2
- SSE3
- SSSE3
- SSE4.1
- SSE4.2
- SSE4a
- AMD64
- AMD-V
- AES
- AVX
- CLMUL
- CVT16
- EVP
- FMA4
- XOP
- Turbo Core
- HT3.1
|
Notes
16KB L1 data cache per core. 64KB L1 instruction cache shared per two cores (per module).
2MB L2 cache shared per two cores (per module).
This processor comes with an unlocked multiplier, allowing users to set the multiplier value higher than the shipped value, to facilitate better overclocking. |