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AMD L3 bug???

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Anyone hear of the AMD L3 bug? What is the issue with them, and what are the solutions? What processors are affected??? TIA
 

cdawall

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it only affects B2 phenoms and it is so insanely rare for it to happen that no one on this forums or any other one i have ever been on has had it happen to one of there members
 
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Hmm, I've never heard of it either. What exactly would happen?
 
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it only affects B2 phenoms and it is so insanely rare for it to happen that no one on this forums or any other one i have ever been on has had it happen to one of there members

what are the B2 phenoms? and how would you know if it's affected? I've heard it hard locks
 
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what are the B2 phenoms? and how would you know if it's affected? I've heard it hard locks

B2 phenoms are the B2 stepping, They were the ones that came out immediately before the B3 stepping(B3s are usually a 9X50 number as apposed to 9X00). Apparently they had an issue with the TLB. I believe that cdawall used to have a B2. It's just an old stepping for them.
 

cdawall

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AMD Family 10h revision B2 processors suffer from an issue in the
processor TLB known as erratum 298. Erratum 298 is documented in
a forthcoming update to the Revision Guide for AMD Family 10h
Processors (PID 41322). The workaround in the Revision Guide
document is intended to be applied by BIOS. The BIOS workaround
has performance implications which can be avoided by having the
OS directly workaround the issue. A Linux 64-bit patch was developed
for 2.6.23.8 by AMD's OSRC team and will be posted to this list by
Joerg Roedel. The patch is for demonstration purposes and is NOT
being recommended to be applied upstream.

Erratum 298 will be described as follows: "The processor operation
to change the accessed or dirty bits of a page translation table
entry in the L2 from 0b to 1b may not be atomic. A small window of
time exists where other cached operations may cause the stale page
translation table entry to be installed in the L3 before the modified
copy is returned to the L2. In addition, if a probe for this cache
line occurs during this window of time, the processor may not set
the accessed or dirty bit and may corrupt data for an unrelated
cached operation. The system may experience a machine check event
reporting an L3 protocol error has occurred. In this case, the MC4
status register (MSR 0000_0410) will be equal to B2000000_000B0C0F
or BA000000_000B0C0F. The MC4 address register (MSR 0000_0412) will
be equal to 26h."

The L2 Eviction Linux kernel performance patch re-enables the
registers set for the BIOS workaround described in the Revision
Guide document. It then prevents the processor from performing the
operation that can trigger erratum 298. The patch works by emulating
the Accessed and Dirty bits.

The basis for the kernel patch solution depends on the root cause of
the L2 eviction problem. The only exposure for the problem is when
the TLB needs to set an A or D bit in a page table entry. If the TLB
never needs to set an A or D bit, the bug cannot occur. By emulating
the A and D bits with the help of the Present and Writable bits, the
patch will ensure the real A and D bits are always preset. It works
by forcing a page fault when the first access is made to a page with
the emulated A bit not set, and when the first write access is made
to a writable page with the emulated D bit not set. Emulated A and D
bits are stored in bits generally available to the OS in the page
table entry.

Elsie Wahlig


here you go L3 bug AKA TLB bug

and here would be a B2 phenom

 
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It's old news by now (months old actually). What's newer is Intel's TLB error that they have pretty much kept under cover.
 

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It's old news by now (months old actually). What's newer is Intel's TLB error that they have pretty much kept under cover.

or the data corruption issues on 790i
 
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cdawall

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or the data corruption issues on 790i

Exactly, why is it that the company that comes out and says they have a problem is the one that gets slammed the hardest?
 
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cdawall

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Exactly, why is it that the company that comes out and says they have a problem is the one that gets slammed the hardest?

because its AMD and they tried to fix the problem not sweep in under the rug
 
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I'm assuming that if it did happen, then I would be able to RMA it, correct?
 
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Exactly, why is it that the company that comes out and says they have a problem is the one that gets slammed the hardest?

Because there's lots of Intel fanboys ready to bash down on AMD over it. You really don't see it as much the other way around, AMD fanboys generally just bitch about the intel fanboys idolizing the C2D chips.
 

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I'm assuming that if it did happen, then I would be able to RMA it, correct?

its not something you RMA its something were the comp just locks up and BSOD again if it happens to you it will be the 1st time its been recorded to happen.

the only time it happens when you absolutely max out the L3 IO
 
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I'm assuming that if it did happen, then I would be able to RMA it, correct?

You would probably get hit with the 15% restocking fee, but yes. I think you'd be better off getting a 9850 or one of the open box 9950s if there are any left.
 
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just concerned if I upgrade to it (if I have enough left over after xmas for an upgrade) that I would have the dumb luck to get one that would do that...
 

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Anyone hear of the AMD L3 bug? What is the issue with them, and what are the solutions? What processors are affected??? TIA

I thought I explained this in your other thread?

I made a point that the original Phenoms including the Phenom 9600 could potentially have the L3 bug and that only the ones ending with 50 such as the 9850/9950 are unaffected. :)
http://forums.techpowerup.com/showpost.php?p=1094420&postcount=14

Edit:

totally didn't even catch that in your thread, lol...

I feel so unappreciated sometimes.:ohwell:
 
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just concerned if I upgrade to it (if I have enough left over after xmas for an upgrade) that I would have the dumb luck to get one that would do that...

Wow, the price of Phenom chips went back up. I remembered seeing some 9550s for less than $120.
If you're really that concerned over the TLB problem though I have my old 9550 that I'm selling($100). I have a guy interested in it, but it looks like he wants to back out. If it's still available when you have the cash I will sell it to you.

Edit:
9550* I made a typo.
 
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