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Recent content by Punkenjoy

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    Intel Prepares Raptor Lake Designs With 24 Cores and 32 Threads, More E-Cores This Time

    At 4K, you are really GPU limited meaning a smaller/lower performance CPU will be enough to do the task. I do not think that it prove they are useful at all in gaming. It just prove that at 4k, people should really focus on upgrading their GPU before CPU. In game where you really need high...
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    Intel Prepares Raptor Lake Designs With 24 Cores and 32 Threads, More E-Cores This Time

    There are many layout possible to alleviate the problem of ringbus. Mesh is one, but there are many others and Ian Cutress at Anandtech made a great article about that. https://www.anandtech.com/show/16930/does-an-amd-chiplet-have-a-core-count-limit Intel, like any other CPU vendor can do...
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    Intel Prepares Raptor Lake Designs With 24 Cores and 32 Threads, More E-Cores This Time

    I think there is a market for a desktop/workstation CPU with a lot of E-cores since there are tasks that can benefits a lot from it. They could cramp a lot of performance in the same surface for 3d rendering and stuff. But i already think having more than 4 E cores is plenty for background...
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    Intel Negotiates 3nm Allocation with TSMC Even as Pat Gelsinger Cautions Against Investing in Taiwan

    I think Intel is totally clueless on how TMSC and many of these company do business. They want cooperation and long term commitment. Intel isn't doing any of those so, yeah, they might get some supply from TSMC. But TMSC will prefer to give more support and allocation to their first hands...
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    ICARUS: DLSS vs. FSR Comparison

    FSR is great for what it is, simple to implement, easy to use upscaling solutions that work on vast amount of hardware. But it's not DLSS. If AMD come up with a DLSS like, it may have the name FSR 2.0, but it won't be related at all as the two technology are totally different. But i still...
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    AMD Radeon RX 6900 XT Liquid Cooled Edition Now On Sale in Europe

    My main issue would be where to use that in my case (Lian Li O11 dynamics). Got 3 area where to put fan and i already have a 360mm on top + 6 120 fan. Adding this is possible but it would look odd. And i am not paying that amount of money for something that would look odd. This is more for...
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    AMD FidelityFX Super Resolution (FSR) Plugin for Unreal Engine 4 Released

    We would have all wanted that... Sharpening solution do not make game blurry, it's actually quite the opposite. As for the other solution, they can make game blurry, but good implementation at higher resolutions are not blurry in higher quality mode. But it indeed depend on pixel density and...
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    Samsung Talks DDR6-12800, GDDR7 Development, and HBM3 Volume Production

    Yes best binned chips of DDR4 4200 bellow JDEC SPEC 4200 DDR5. Indeed a stick with a set of the best binned chips for DDR4 will beat bellow average DDR5. But if we go that path, if we could had DDR at 4200, it would beat DDR4 by huge margin. That is just not possible. But this is the end of...
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    AMD FidelityFX Super Resolution (FSR) Plugin for Unreal Engine 4 Released

    I hope that some of UE4 game that do not run very well just load this plugin. Simple performance boost for small studios that do not have the skill or the time to optimise their game better. and you don't use TSR? does FSR would still make sense ?
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    PlayStation 3 Emulator Delivers Modest Speed-Ups with Disabled E-Cores on Intel Alder Lake Processors

    A larger Cache won't help to reduce latency as a data that got processed by another CCD will remain there, they will just be able to hold more. CCD to CCD isn't much faster than memory access so it won't really help there. What AMD could do with a larger interposer is to add Infinity fabrics...
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    PlayStation 3 Emulator Delivers Modest Speed-Ups with Disabled E-Cores on Intel Alder Lake Processors

    The thing is on Zen 2, communication between CCX had to go thru the I/O die. The infinity fabric could become saturated by all those access and it had to compete with memory and i/o access too. And this round trip to the I/O die was costly on latency and power usage. On Zen 3, all core within...
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    PlayStation 3 Emulator Delivers Modest Speed-Ups with Disabled E-Cores on Intel Alder Lake Processors

    The main thing is Intel should have include a downgraded version of AVX512 on the E-Cores. They could run the instruction but much slower than on the P core to reduce the amount of transistors used. This way they could have kept it on the P-Cores and the thread director could have moved the...
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    Samsung Talks DDR6-12800, GDDR7 Development, and HBM3 Volume Production

    Indeed but if you compare a DDR4-3200 and a DDR5 6400, the same 64 bit word should arrive in the same timeframe on both memory. The DDR5 will send it 2x32 bit in the same timeframe the DDR4 will send the 1x64 bit. This will be the same for DDR6-12800 vs DDR5-6400. In the end, on a single...
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    Samsung Talks DDR6-12800, GDDR7 Development, and HBM3 Volume Production

    Don't worry, we will have few years of "Oh god this cas latency suck" and after that maybe a year of "it's not worth upgrading to DDR6 over DDR5" before it become mainstream.
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    Samsung Talks DDR6-12800, GDDR7 Development, and HBM3 Volume Production

    This is still far from coming to the market but it look like the 2020 decades will have much more advancement than the 2010 decades. We will see how price goes... I think this is due to : Return of the competition in both GPU and x86 CPU market ARM with Apple giving x86 a hard time New...
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