Why does GTX690 consume less power than GTX680 2 way SLI?

[Gainward]

So we've seen the spec of this new card (GTX690) and I'm really impressed with it's TDP (300W)
while GTX680 has a TDP of 195W, and considering that GTX690 based of 2 GTX680 GPUs so I assumed GTX690 would have a TDP of 380W or something


Here, I read that GTX690 doesn't even consume 300W, it's actually 263W

Although the TDP is 300W and the target GPU Boost is limited to 263W (maximum value so that it can increase the frequency, but it does not reduce it under 300W), the GeForce GTX 690 is supplied through PCI Express 8-pin (375W) two connectors, enough to be able to leave more room for overclocking. Drivers allow an increase of 35% of the GPU Boost or target 355W maximum.

So I'm a little bit confused

 

[the54thvoid]

Slower clocks, better cooling (= cooler chips = better power efficiency). Add in some tinkering and you have some reasons.

And then wait for reviews for actual power draw and then there might well be power throttling.

 

[Fourstaff]

Also, all the best chips are binned to the 690

 

[MasterInvader]

Easy answer the 690 don´t have Dual 680´s on board, it´s more like Dual "670´s" and it´s same thing with the GTX590.

Regarding performance a dual GPU card will never be as good as 2WaySLI [dual cards].

 

[sneekypeet]

Also, all the best chips are binned to the 690

Seriously? Not trolling, but it seems if they were binning cores, they wouldn't be running them underclocked from the original cores. Or are you saying they are binned by voltage used only?

 

[Gainward]

Why wouldn't they use those "best gpus" to 680s?

 

[LAN_deRf_HA]

Pretty sure when they bin for dual gpu cards it's for heat/power. Regardless of how well binned they are they'd still suck down a good bit more at 680 speeds.

 

[Gainward]

Slower clocks, better cooling (= cooler chips = better power efficiency). Add in some tinkering and you have some reasons.

And then wait for reviews for actual power draw and then there might well be power throttling.

would the 690 consume the same if it runs the same frequencies? (as 680)

 

[Fourstaff]

Seriously? Not trolling, but it seems if they were binning cores, they wouldn't be running them underclocked from the original cores. Or are you saying they are binned by voltage used only?

In addition to running underclocked and undervolted, they still do need to cherry pick some (at very least in the earlier batches of production), otherwise there will be problems. Don't quote me on this though, its just a tidbit I ran across but have since lost the proof for it. They did it for the 5970, then the 6990, and then 590, so I suppose they did it with 690 too.

 

[DarkOCean]

Nvidia are a little optimistic about their TDPs ,wait for wizz review and see the truth when its out.

 

[cadaveca]

In addition to running underclocked and undervolted, they still do need to cherry pick some (at very least in the earlier batches of production), otherwise there will be problems. Don't quote me on this though, its just a tidbit I ran across but have since lost the proof for it. They did it for the 5970, then the 6990, and then 590, so I suppose they did it with 690 too.

Typically chips used in dual GPU cards kinda get the same binning as laptop chips do. In this, they tend to look for chips with the lowest leakage, which, of course, means heat. And I mean directly; leakage = heat given off.

THEN they downclock even more(maybe, but usually for laptop chip, dual GPU chips) to increase the size of that bin to a reasonable amount so that they have a large supply of chips, with the demand of such a product in mind dictating where that goal is. They have a specific number of chip in mind, so they adjust clocks and allowed leakage limits to make sure they can fill that "ordered number" of chips.

This is why we get re-spins. If targets are not met, in the way I just described, or there is a critical flaw that prevents operation, they then make changes, and get new wafers. A0 could be first design, first run, A1 same design second run, B0 a revisied design first run, B1 a second run, etc, etc, etc...

There's no way to know exactly what those revisions mean...or what sort of sorting they are doing for what power targets and frequencies(as power consumed is largely tied to the frequency the chip runs at), so it's impossible to figure out just exactly how they are binning chips, but generally speaking, it's actually pretty basic.