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TSMC to Commence 10 nm Volume Production by Q4-2016

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Semiconductor foundry TSMC assured its clients that the company will be ready with a 10 nanometer manufacturing node for volume production, by the 4th quarter of 2016. Company president and joint-CEO Mark Liu made this announcement during the company's recent Q2-2015 earnings call. "The recent progress of our 10 nanometer technology development is very encouraging and on track with our plan," he said. With volume production of chips commencing in Q4, some of the first products based on them should begin appearing in early-2017. "We ramp up 10 nm in the Q4 2016 next year, but the real product shipment will be in Q1 2017," said C.C. Wei, co-CEO.



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Still not the rate of development we had, but heck, if they can stick to that deadline it's better than our current nodes and I'll take what I can get...
 
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Query - What happens when physically its not possible any further shrink ???
 
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Query - What happens when physically its not possible any further shrink ???

Well, most likely... "instead of shrinking, expand!"

hint: the third dimension
 
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Query - What happens when physically its not possible any further shrink ???

Many of the things you currently see with technologies like NAND or even HBM; change of material, die-stacking, etc.

Well, most likely... "instead of shrinking, expand!"

hint: the third dimension

Right. TSV, etc etc.


My query: What comes first: 10nmHP (or simply being able to scale the process to larger or more power-hungry applications) or Intel's full transition (including HEDT) to 10nm? This is not just wrt to TSMC, but also Samsung/GF. While products based on it probably won't appear until 2018 (read: the infamous Volta etc), and granted surely Intel (with it's shorter lead time) will have products by then...It would be an interesting thing if there is ANY overlap, as in theory (read: paper specs based on gate sizes and sram tests) those processes should trump Intel's 14nm. If nothing else, exciting purely on the fact the gap, while perhaps not disappearing, is certainly shortening very quickly. It shall be even more exciting if Samsung/TSMC partners do indeed embrace more 3D designs, where-as Intel seems much more quiet in that regard.
 
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My query: What comes first: 10nmHP (or simply being able to scale the process to larger or more power-hungry applications) or Intel's full transition (including HEDT) to 10nm?
Probably neck and neck, TSMC might get there first simply because they NEED to, although Intel seem to be playing a longer game - making sure they have the tooling in place for both 10nm and 7nm ramps. Both Intel and TSMC (as well as Samsung) have a common bottleneck - tooling and validation from ASML. Intel poured cash into a 15% stake in ASML (which is double that of Samsung and TSMC combined), and their initial order for fifteen systems should get them through validation, risk production, and somewhat limited commercial production. I suspect that TSMC and Samsung will concentrate on 10nm and then adapt to 7nm, while Intel could very well develop both processes pretty much concurrently.
 
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Very late. But then again, Intel always had better engineers and R&D... We also should watch Samsung closely.
 
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10nm and then adapt to 7nm, while Intel could very well develop both processes pretty much concurrently.

I can bet it's being done to minimize the risk, as one of those nodes could flop again. They may know something, that others don't do.
 
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I suspect that TSMC and Samsung will concentrate on 10nm and then adapt to 7nm, while Intel could very well develop both processes pretty much concurrently.

I believe you will end up being correct, but we shall see. IIRC TSMC has indeed mentioned 7nm will be closer to what us folk refer to as an optical shrink (or other small design change), rather than a full transition. IOW, (and I know you already know this) not unlike 14nm is from 20nm, 40 was from 45, 55 from 65, etc. Whenever I have tried to search for an updated outlook on TSMC's plans, which granted has been a while, I seem to recall mentions of things like triple-patterning...and I just shake my head. Don't get me wrong, they sure as hell know more about what they are doing than I do, and we all know R&D is ridiculously expensive, but sometimes I question TSMC. Unlike Samsung, whom will happily suffer a long, slow, ramp to achieve their goals...TSMC seems more the type to rush themselves there and then deal with the consequences of faux pas (ex: vias issues and lack of HKMG on 40nm) after the fact. The difference being now they actually have competition...they can't simply force Apple, Qualcomm, AMD, and nVIDIA to deal with it. I seriously don't know if that will make them better...or worse.

I truly think Samsung (or essentially whatever ties that bind the loose CPA) is the wild card. While their 10nm improvements and ramp schedules could go either way, I really am curious of the plan for 7nm. While I'm not one for conspiracy theories (ok, I guess I am), I have to wonder how deep the rabbit hole between them and GF goes. You know, the same company that bought IBM's chip division which recently had a gigantic breakthrough regarding 7nm...
 
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Query - What happens when physically its not possible any further shrink ???

Switch from Silicon to Gallium Arsenide. After that, Quantum!
 
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I truly think Samsung (or essentially whatever ties that bind the loose CPA) is the wild card. While their 10nm improvements and ramp schedules could go either way, I really am curious of the plan for 7nm.
I've looked around to try to find any mention of tool contracts for Samsung, but as of this time it seems that their orders lag behind Intel and TSMC. The closest thing to a schedule I've found was this:
Wennink says ASML expects to deliver four NXE:3350Bs in 2015 in addition to two already on order. With Intel and TSMC already down for two of the leading-edge machines each, it’s possible that Samsung is also expected to confirm an order for the machine.
I know that the NXE:3300B can be retrofitted for sub-10nm production (and is in progress - I think the risk production at Intel is using the system), but I wouldn't be too sure about throughput or commercial viability (cost per wafer) though. The order book for ASML is easy enough to ascertain, but the retrofitting/updating of existing systems seems a little harder to quantify

While I'm not one for conspiracy theories (ok, I guess I am), I have to wonder how deep the rabbit hole between them and GF goes. You know, the same company that bought IBM's chip division which recently had a gigantic breakthrough regarding 7nm...
AFAIA, the 7nm IBM node is FD-SOI. IBM are partnering with ST-Micro, and SOITEK ( who I think are still the biggest (only?) suppliers of SOI process wafers). No doubt, ST-Micro will offer licences - and GloFo has already licenced ST-Micro's 14nm FD-SOI (which GloFo calls 22FDX), although they had previously licenced STM's 20nm - which has since been shelved. Samsung and STM are pretty close, so it wouldn't surprise to see GloFo weigh in.
 
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TSMC marketing shows signs that they do not sleep. But perhaps we should put them to rest.

These guys haven't shown yet a single working mass produced 16-nm product, it's extremely annoying that they open their big mouths with false promises.
 
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AFAIA, the 7nm IBM node is FD-SOI. IBM are partnering with ST-Micro, and SOITEK ( who I think are still the biggest (only?) suppliers of SOI process wafers). No doubt, ST-Micro will offer licences - and GloFo has already licenced ST-Micro's 14nm FD-SOI (which GloFo calls 22FDX), although they had previously licenced STM's 20nm - which has since been shelved. Samsung and STM are pretty close, so it wouldn't surprise to see GloFo weigh in.

http://www.eetimes.com/document.asp?doc_id=1327087

ee times said:
The three major breakthroughs made by IBM to produce its test chip is the perfection of EUV lithography, the successful deposition of strained silicon-germanium transistor channels on bulk silicon wafers, and its optimization of middle-of-the-line and back-end-of-line processing for minimization of parasitic capacitance, thereby making its process manufacturable by merely transferring it to a 7-nanometer fab (which will cost GlobalFoundries and Samsung upwards of $6-to-10 billion each to build).
 
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Switch from Silicon to Gallium Arsenide. After that, Quantum!
You mean picometre (pm)? Neh, there is no tech yet to go atom level, not to mention sub-atomic...
 
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You mean picometre (pm)? Neh, there is no tech yet to go atom level, not to mention sub-atomic...

A transistor on TSMC's 16nm FF+ would have an area more than 5120 nm².

Can you imagine how far is that so called """16""" nm from anything atom level.

Yes, I would guess there should be pm technologies (because marketing decides :laugh: ) sooner or later.
 
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TSMC marketing shows signs that they do not sleep. But perhaps we should put them to rest.

These guys haven't shown yet a single working mass produced 16-nm product, it's extremely annoying that they open their big mouths with false promises.
Um, what? they HAVE shown 16nm products working. mass production will start soon. 2016 will see pascal and arctic islands, and zen, on 16/14nm.

Even intel, with its engineering and monetary superiority, is having issues with 14nm. broadwell was delayed, and full wattage parts delayed even further. 10nm cannonlake is also delayed.
 
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Um, what? they HAVE shown 16nm products working. mass production will start soon. 2016 will see pascal and arctic islands, and zen, on 16/14nm.

Early next year is not that soon. Let's assume that Pascal and Arctic Islands* will appear in 2Q 2016.
Do not expect 10 nm products even in 2017. More likely 2018-2019.
They can manufacture something small on 10nm in 2017.

*Arctic Islands can be a GloFo deal, not TSMC, this is TBC.
 
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Early next year is not that soon. Let's assume that Pascal and Arctic Islands* will appear in 2Q 2016.
Do not expect 10 nm products even in 2017. More likely 2018-2019.
They can manufacture something small on 10nm in 2017.

*Arctic Islands can be a GloFo deal, not TSMC, this is TBC.

Right. While it's really difficult to predict the ramps of any process (although I think it's fair to say Samsung leans toward early production if even a slow ramp, TSMC a longer-delayed process and quicker ramp) it's usually a solid 12-15 months from production/availability of mobile parts to high-performance parts...at least when it comes to companies/products outside Intel (or even not if you consider the true performance parts to be HEDT, and exponentially longer if they produced reticle-bound chips). This was true of 28nm (iirc one of the fpga companies had parts in q410, 7000/600 series launched more-or-less q112), and seems to be also true of 14/16nm (Exynos 7420 launched in the s6 on 4/9, 820 will probably be six months later). If you figure TSMC/Samsung may ship products to customers in Q117, probably meaning Qualcomm, I think it's fair to think 10nm for a larger chip will be a year or so after that...or IOW roughly two years after when we expect the first 14/16nm performance parts. Also, Volta is clearly...at least at this point....planned as a 10nm product (which is more-or-less required for 3d production) and according to nvidia, scheduled for 2018. It matches their cadences of mid-range chip as high-end consumer part the first year of a process, large chip for pros the first year (when yields are shit) and/or for consumers the second year, repeat.

2018 *may* see the start of 7nm mobile chips, essentially keeping up with Moore's Law (with or without Intel) as IBM's breakthrough may spearhead that process, but it would be insane to speculate that far out. We also don't know if Intel will play catch up at 7nm, and/or how successful TSMC will be in their migration to their 7nm. It could be a quick and successful shrink assuming they have tested some aspects at 10nm and they migrate well....It could also be a bloody disaster like 40 (and 20)nm.
 
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Um, what? they HAVE shown 16nm products working. mass production will start soon..
TSMC marketing shows signs that they do not sleep. But perhaps we should put them to rest.
These guys haven't shown yet a single working mass produced 16-nm product, it's extremely annoying that they open their big mouths with false promises.
Hisilicon's PhosphorV660 32-core ARM and D02 server board - made on TSMC's 16nm - is actually available for sale directly from Hisilicon - and has been for about four months
 

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Screw 10nm, we want 14nm for new GFX cards like yesterday.
 
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Screw 10nm, we want 14nm for new GFX cards like yesterday.
I'm guessing next year Pascal will be made in TSMC at 16nm which is basically 20nm with FinFETs
 

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Still wont have me upgrading but dam it will freshen the market up once again. And if they are going to start taking so long to shrink may as well wait for the tweaked 16\20nm
 
Joined
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Query - What happens when physically its not possible any further shrink ???
much like to what happens every time there is a dead-end in every technology,
they pick something from the reaserch-stack and put it into mainstream production.
It will be expensive at first but it will become cheaper as more and more companies jump into it.
I bet that there are 10 or more alternatives to silicon out there, not to mention the silicon photonics technology.

I think that the physical limit of the silicon is less than 1 nm, which is IIRC 7 atoms wide, thus making 0.14nm a possible goal (?!).

I believe also that there is too much attention on the lithographic node of each chip. intel proved that an immature node, e.g. 28 or 22 nm is impossible to give you the benefits you expect in comparison to a mature node, e.g. 40nm.
At 40nm z196 was amazing, so even if the progress stops at 10nm or 7nm there are years upon years of r&d to take full advantage of that node.
To conclude, there are so f'ing many things to consider when making a cpu, that the lithographic node is only a fraction of what you actually should consider... but that's what makes (mostly) people consider when buying a cpu.
 
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I believe also that there is too much attention on the lithographic node of each chip. intel proved that an immature node, e.g. 28 or 22 nm is impossible to give you the benefits you expect in comparison to a mature node, e.g. 40nm.
At 40nm z196 was amazing, so even if the progress stops at 10nm or 7nm there are years upon years of r&d to take full advantage of that node.
To conclude, there are so f'ing many things to consider when making a cpu, that the lithographic node is only a fraction of what you actually should consider... but that's what makes (mostly) people consider when buying a cpu.

That is all for the benefit of the manufacturer, simply.
Smaller process == smaller die size for the same chip
smaller die size == more chips on the same wafer
more chips on the same wafer == [much] lower manufacturing costs
lower manufacturing costs == higher market margin for chips they sell
higher market margin == MONEY!!!!!!!

this applies regardless if the company owns and uses their own fabs (e.g. Intel) or is a fabless one (e.g. AMD, Nvidia)

P.S. that said, AMD should move from 28nm for their CPUs, FFS B(
 
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