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TSMC, the world's biggest contract semiconductor manufacturer, who is at the forefront of 7 nanometer production has just announced that they are making good progress with their second generation of 7 nm technology "N7+", using EUV (Extreme Ultraviolet Lithography). A first design for N7+ from an unnamed customer has been taped out. The company's first-gen 7 nm production is running well already, with final products, like Apple iPhone already in the hands of customers.
While not fully EUV yet, the N7+ process will see limited EUV usage, for up to four non-critical layers, which gives the company an opportunity to figure out how to make best use of the new technology, how to ramp up for mass production and how to fix the little quirks that show up as soon as you move from the lab to the factory.
The new technology is expected to bring 6-12% lower power and 20% better density, which could be especially important for power and heat constrained designs. It will also be a good marketing vehicle for many of TSMC's customers who are expected to release new designs every year. With the N7+ process, TSMC is targeting the automotive sector, too, where releases happen more slowly, which suggests that this process will be available for a long time.
Moving beyond 7 nanometers, TSMC's target is 5 nm, internally called "N5". This process will use EUV for up to 14 layers and is expected to be ready for risk production in April 2019. According to TSMC, many of their IP blocks are ready for N5, with the exception of PCIe Gen 4 and USB 3.1. We have all been waiting for PCIe Gen 4 on new GPUs and it looks like we'll have to wait even longer for this new version to become available. Compared to the N7 designs, which have initial costs in the $150 million range, the cost for N5 is expected to increase even further, up to $200 to $250 million.
View at TechPowerUp Main Site
While not fully EUV yet, the N7+ process will see limited EUV usage, for up to four non-critical layers, which gives the company an opportunity to figure out how to make best use of the new technology, how to ramp up for mass production and how to fix the little quirks that show up as soon as you move from the lab to the factory.
The new technology is expected to bring 6-12% lower power and 20% better density, which could be especially important for power and heat constrained designs. It will also be a good marketing vehicle for many of TSMC's customers who are expected to release new designs every year. With the N7+ process, TSMC is targeting the automotive sector, too, where releases happen more slowly, which suggests that this process will be available for a long time.
Moving beyond 7 nanometers, TSMC's target is 5 nm, internally called "N5". This process will use EUV for up to 14 layers and is expected to be ready for risk production in April 2019. According to TSMC, many of their IP blocks are ready for N5, with the exception of PCIe Gen 4 and USB 3.1. We have all been waiting for PCIe Gen 4 on new GPUs and it looks like we'll have to wait even longer for this new version to become available. Compared to the N7 designs, which have initial costs in the $150 million range, the cost for N5 is expected to increase even further, up to $200 to $250 million.
View at TechPowerUp Main Site
