SK Hynix Unveils DDR5 Memory Details, Production to Start This Year

[AleksandarK]

SK Hynix has today posted an update on their blog about the upcoming DDR5 memory, which they have developed in co-respondence with JEDEC's progression of the standard. They have noted a few key things, among which some of the most interesting are features like the maximum speed of 8400 Mbps. The DDR5 standard is very flexible, allowing manufacturers to release their chips with frequencies ranging anywhere from 3200-8400 Mbps. While the lowest speed is 3200 Mbps, manufacturers are starting with 4800 Mbps chips and building their way up from there. The minimum density of a single DDR5 die is 8 Gb, while the maximum is 64 Gb, quadrupling the maximum capacity of DDR4 dies.

Perhaps one of the biggest changes besides capacity and speed improvements is the addition of Error-Correcting Code (ECC) support for memory. This feature is now not exclusive to special dies, like with DDR4, but rather is built inside every die. The DDR5 memory chips use 32 banks, split into 8 bank groups, which is designed to provide as much bandwidth as possible. Burst Length is doubled to 16, compared to 8 of DDR4, so memory access availability is better. Operating Voltage is decreased to 1.1 V, from the previous 1.2 V of DDR4, resulting in an overall decrease of 20% of power consumption. The mass production of SK-Hynix's DDR5 chips will start this year, however, exact timing is unknown.


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[Assimilator]

Oof, built-in ECC means this is gonna be expensive AF.

 

[dj-electric]

24Gb configs should be pretty cool, Imagine 48GB and 96GB kits.

 

[Cheeseball]

Oof, built-in ECC means this is gonna be expensive AF.

This is true, but as time goes on with implementing ECC by standard, it would be more affordable than creating two separate memory lines.

 

[Basard]

So, what would be the speed of the RAM, actually? Like DDR brought us two transfers per cycle.... does this bring another transfer or does it double the transfers? Or is it just brute speed we are seeing? 4200Mhz=8400Mt/s?

 

[R0H1T]

Built in ECC for consumer chips, won't that need Intel/AMD support first?

 

[Caring1]

"The mass production of SK-Hynix's DDR5 chips will start this year, however, timing is unknown."
No pun intended i'm sure

24Gb configs should be pretty cool, Imagine 48GB and 96GB kits.

My wallet just melted thinking about it.

 

[Flanker]

Hmm does that mean the DDR4 to DDR5 transition period is almost upon us?

 

[ppn]

single digit share in 2020, 11% in 2021 and 22% in 2022.

 

[btarunr]

Hmm does that mean the DDR4 to DDR5 transition period is almost upon us?

Don't think so. At least another year before DDR5 client platforms.

 

[IceShroom]

So, what would be the speed of the RAM, actually? Like DDR brought us two transfers per cycle.... does this bring another transfer or does it double the transfers? Or is it just brute speed we are seeing? 4200Mhz=8400Mt/s?

The speed in the article should be in MT/s not MHz.

 

[ShurikN]

Built in ECC for consumer chips, won't that need Intel/AMD support first?

Doesn't Amd already have support for ecc on all their desktop parts. Board manufacturers just need to enable it.

 

[TheTechGuy1337]

ECC is standard. FINALLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLY!