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16-Core Intel Alder Lake-S Processor Appears with DDR5 Memory

AleksandarK

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Intel has just launched its Rocket Lake-S desktop lineup of processors during this year's CES 2021 virtual event. However, the company is under constant pressure from the competition and it seems like it will not stop with that launch for this year. Today, thanks to the popular leaker @momomo_us on Twitter, we have the first SiSoftware entries made from the anonymous Alder Lake-S system. Dubbed a heterogeneous architecture, Alder Lake is supposed to be Intel's first desktop attempt at making big.LITTLE style of processors for general consumers. It is supposed to feature Intel 10 nm Golden Cove CPU "big" cores & Gracemont "small" CPU cores.

The SiSoftware database entry showcases a prototype system that has 16 cores and 32 threads running at the base frequency of 1.8 GHz and a boost speed of 4 GHz. There is 12.5 MB of L2 cache (split into 10 pairs of 1.25 MB) and 30 MB of level-three (L3) cache present on the processor. There is also an Alder Lake-S mobile graphics controller that runs at 1.5 GHz. Intel Xe gen 12.2 graphics is responsible for the video output. When it comes to memory, Alder Lake-S is finally bringing the newest DDR5 standard with a new motherboard chipset and socket called LGA 1700.


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ixi

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Know what... is this really the way? To make few stronger cores and other weakers?
 
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Know what... is this really the way? To make few stronger cores and other weakers?

No idea, but very curious to find out.
 
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Intel will announce alder lake at end of 2021, we will see if they are available in 12 Months.
 
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The thing is, Icelake-Xeons are 10nm but not SuperFin. After that Sapphire-Rapids is said to be 7nm if i´m not mistaking, and intel 7nm is delayed by about 1 year.
So GoldenCove is basically TigerLakes Core, wich is 10nm SuperFin but by now tops out at 4 Cores.
So AlderLake comes with the Combination of newer than RocketLake big Cores plus newer than Tremont little Cores.
Will be a composition of upto 8 big SMT-Cores (each 1.25MB L2 and 3MB L3) paired with two 4-Core Clusters (each 1.25MB L2 and 3MB L3) of Gracemont Atoms wich lack SMT,
leading to 12.5MB L2 and 30MB L3, 8 Core-Threads + 8 SMT-Threads from the big cores and 8 Core-Threads from the 2 Quadcore Atom-Clusters ... so 24 Threads in Total.
There will be also Variants without activated Atom-Clusters, wich are quite similar to RocketLake 8-Cores plus SMT, but upgraded to 10nm SuperFin and Tigerlake aka GoldenCove technic.

For better understanding here a presentation-slide of Lakefield, mind the concurrent usage of the big SunnyCore Core (SNC) and the small Tremont Foreground(TNT FG) and Background (TNT BG) usage.
Because of implementation issues, also regarding Microfoft Windows, the big Cores SMT and AVX needed to be permanently deactivated from factory. AlderLake and some newer Windows-Versions should have fixed these culpits.
 
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yes because the big Cores and the fabrics get worse and worse idle comsumption values, so the little cores are needed when battery/heat/efficiency constained, where even a bigger and bigger bunch of server-centers will need those hybrid sollutions in near future, some demand it even today.
 
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yes because the big Cores and the fabrics get worse and worse idle comsumption values, so the little cores are needed when battery/heat/efficiency constained, where even a bigger and bigger bunch of server-centers will need those hybrid sollutions in near future, some demand it even today.
But you don’t need 8 of them for background tasks. Seems like wasted silicon.
 
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TheLostSwede

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This seems to be the only way to combat ARM. I wonder how long amd takes to come out with their version of big.little.
 
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But you don’t need 8 of them for background tasks. Seems like wasted silicon.
thats a thing of the targeted goal, look how different the approach is for the P chips vs the S chips, P has an obvious focus on more Atom and less big Cores
like 2 big Cores plus both full Quad-Core Atom Clusters
Additionally i think actually a bunch of the competitive Games have a clear limit at 1 to 3 heavy Threads in Games, the rest of the Threads could be easily run on Atom-style Cores in my opinion.

 
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I can see the benefits of big/little core design on mobile/battery powered cpu. But for a plugged in desktop cpu. I would rather have 16 powerful cores like ryzen 9 5950X have it.
 
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Hi,
Binning cuts into profits so they use crappy chips and boom now all they have to do is hype and sell it as by design.
 
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pfff.... 10nm is soooo, like, 2019-ish, y.A.w.N.... :)

Meanwhile, almost everyone else who is anyone in the tech world is moving full speed ahead onto 7/5/3/2nm nodes....

Also why are clock & boost speeds going backwards... yea I kno... heat, TDP yada yada yada

Good to see DDR5 mentioned though, so there's that !
 
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But you don’t need 8 of them for background tasks. Seems like wasted silicon.
Atom cores are exceptionally small and perform very well relative to their die size. Having eight low power cores will boost multi-threaded performance better than faster, larger cores of the same die size.

In fact, it's a rather clever approach as long as there is enough fast cores for more common lightly-threaded tasks.
 

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pfff.... 10nm is soooo, like, 2019-ish, y.A.w.N.... :)

Meanwhile, almost everyone else who is anyone in the tech world is moving full speed ahead onto 7/5/3/2nm nodes....

Also why are clock & boost speeds going backwards... yea I kno... heat, TDP yada yada yada

Good to see DDR5 mentioned though, so there's that !

You do know that Nano-meter is basically marketing which you've totally fallen for.

The definition of the 10nm on Intel Fabs is different from the definition used at TSMC, they use to be similar back around 22nm but now it's all gibberish.
Better to look at transistor density - basically intel 10nm is as dense as TSMC 7nm.
 
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This seems to be the only way to combat ARM. I wonder how long amd takes to come out with their version of big.little.
AMD/Lisa Su during the 2021 CES has stated their will be no Big.Little from AMD. They will however scale Zen from low power to high power/performance.
 
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AMD/Lisa Su during the 2021 CES has stated their will be no Big.Little from AMD. They will however scale Zen from low power to high power/performance.
They seem to be working on something related to it.
 
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In the case of Apple M1 sure is..
That's only because they write the code it runs on.

They seem to be working on something related to it.
Nah, they've already researched it a while back but have no for plans for production anytime soon because windows...

It's been 15+ years, so this is not a new concept in any way shape or form. We continue to study it, we continue to look at it. We're not going to talk about whether we'll do it or not, but I'm going to talk about some of the challenges of it and around what you really want to do with it. Is the goal power efficiency? Is the goal more performance? Is the goal just marketing, 'I want more core count', regardless of what it does for the other two variables? […] We're not going to do it just to have a bigger number."

 
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Beside all recent speculation about the usability and performance of AlderLake in an desktop gaming pc, the big eyeopening will happen when actual threadusage-behaviour gets profiled with loggings and in-game overlays, wich will show if in some older games, that the main gamethread aka 1 core will get a big core and all other softwarethreads may get only a little core eventually.
Then everyone can see how many heavy taxing softwarethreads every game really needs.
 
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