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Intel Xeon "Sapphire Rapids" Processor Die Shot Leaks

AleksandarK

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Thanks to the information coming from Yuuki_Ans, a person which has been leaking information about Intel's upcoming 4th generation Xeon Scalable processors codenamed Sapphire Rapids, we have the first die shots of the Sapphire Rapids processor and its delidded internals to look at. After performing the delidding process and sanding down the metal layers of the dies, the leaker has been able to take a few pictures of the dies present on the processor. As the Sapphire Rapids processor uses multi-chip modules (MCM) approach to building CPUs, the design is supposed to provide better yields for Intel and give the 10 nm dies better usability if defects happen.

In the die shots, we see that there are four dies side by side, with each die featuring 15 cores. That would amount to 60 cores present in the system, however, not all of the 60 cores are enabled. The top SKU is supposed to feature 56 cores, meaning that there would be at least four cores disabled across the configuration. This gives Intel flexibility to deliver plenty of processors, whatever the yields look like. The leaked CPU is an early engineering sample design with a low frequency of 1.3 GHz, which should improve in the final design. Notably, as Sapphire Rapids has SKUs that use in-package HBM2E memory, we don't know if the die configuration will look different from the one pictured down below.


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Looks good. AMD has no chance all their future products is on paper. Has not engineer samples.
 
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Looks good. AMD has no chance all their future products is on paper. Has not engineer samples.
Considering all the wasted paper Intel shredded over 10mm...

Intel still cant beat AMD in core count or prices.
 
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95Viper

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OK, now, stay on topic... the topic is "Intel Xeon "Sapphire Rapids" Processor Die Shot Leaks".
It is not about each other's posts...
Do not insult other members because you disagree with their opinions.
Keep it civil and on topic.

Thank You
 
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So, uhh...
It's basically a bunch of smaller Xeons glued together with something in between to let them communicate?
In other words, Threadripper for Intel?
That's cool, especially since the section of the CPU that has the cores isn't as spread out from the middle (if this engineering sample is how it will end up looking and working).
 
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Good heavens that is a humongous CPU package! You could chuck that thing at someone and probably kill or severely injure them! You will have have motherboard cracking heatsink tension just to get good contact pressure across that endless heatspreader! I could crack an egg on that there heatspreader and it wouldn't dribble over the edge! I could flip pancakes on that thing!
 
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So, uhh...
It's basically a bunch of smaller Xeons glued together with something in between to let them communicate?
In other words, Threadripper for Intel?
That's cool, especially since the section of the CPU that has the cores isn't as spread out from the middle (if this engineering sample is how it will end up looking and working).
This is IMHO somewhat of a mixed bag.

The performance should (in theory) be better due to shorter communication distances, but on the flip side, the performance may suffer due to the heat because the dies are side by side.

Also, the packaging costs will be higher. The ultimate question here is whether that extra cost and heat issues are enough to outweigh the added performance or not, I look forward to finding out.
 
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I hope I get a chance to use a sapphire Rapids and an epyc with similar core counts. It will be fun to see how their performance compares in a couple different use case scenarios. If Intel wants to be an option for high core count processors. I'm also curious how the latency between the cores furthest away from each other compares.
 
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