JEDEC Publishes the New LPDDR5X Memory Standard

[btarunr]

JEDEC Solid State Technology Association, the global leader in standards development for the microelectronics industry, today announced the publication of JESD209-5B, Low Power Double Data Rate 5 (LPDDR5). JESD209-5B includes both an update to the LPDDR5 standard that is focused on improving performance, power and flexibility, and a new LPDDR5X standard, which is an optional extension to LPDDR5.

Taken together, LPDDR5 and LPDDR5X are designed to significantly boost memory speed and efficiency for a variety of uses including mobile devices, such as 5G smartphones and artificial intelligence (AI) applications. Developed by JEDEC's JC-42.6 Subcommittee for Low Power Memories, JESD209-5B is available for download from the JEDEC website.



Key updates to this latest version of LPDDR5 include:

• Speed extension up to 8533 Mbps (versus up to 6400 Mbps in the previous revision)
• Signal Integrity improvements with TX/RX equalization
• Reliability improvements via the new Adaptive Refresh Management feature

The new LPDDR5X component of JESD209-5B is an optional extension intended to offer higher bandwidth and simplified architecture in support of enhanced 5G communication performance, and is designed for applications ranging from automotive to high resolution augmented reality/virtual reality and edge computing using AI.

"As one of the fastest memories in recent memory to move from concept to industry standard, LPDDR5x is not only a turbo-charged pacesetter for the smartphone marketplace," according to Mian Quddus, JEDEC's Chairman of the Board of Directors, "but a power-conserving solution that will set the bandwidth bar considerably higher in taking 5G into a wider consumer embrace worldwide."

Industry Support
Micron Technology: "As a leader in low-power memory, Micron collaborated closely with other JEDEC members to define LPDDR5X, providing the mobile ecosystem a critical advancement in higher bandwidth," said Osamu Nagashima, Micron senior manager of mobile systems architecture and vice chair of the JEDEC low power memories subcommittee. "LPDDR5X's higher speed interface will open doors to new 5G and AI use cases, delivering better user experiences across memory-intensive applications such as gaming, photography and streaming media."

Samsung Electronics: "Samsung has joined with others on JEDEC's JC-42.6 subcommittee in standardizing one of the most eagerly anticipated memory advancements in quite some time—a mobile memory interface that can provide substantial bandwidth expansion with minimal IP change and without compromising power efficiency," said Doohee Hwang, principal engineer for mobile DRAM product planning, Samsung Electronics. "In lockstep with JEDEC's LPDDR5/5X standardization process, Samsung also has been working closely with leading manufacturers to pave the road for the next generation of smartphones, laptops and other mobile computing devices."

Synopsys: "Our customers are developing systems that require significantly higher performance memory interfaces at lower power to address the massive bandwidth demands of mobile, automotive and edge computing applications," said John Koeter, senior vice president of marketing and strategy for IP at Synopsys. "As an active member of JEDEC, Synopsys is developing IP with the lowest latency and area for the latest JEDEC standards, including LPDDR5X where we already have early customer adoption."

View at TechPowerUp Main Site

 

[Space Lynx]

yay lets keep celebrating high latency ram that is going to slow down AM5 systems... haha

don't give me that "every new DDR generation takes a bit to catch up to the old generation" nah homie, that's called milking you for all you got

oh wait this is different from desktop ddr5. eh. my point still stands for desktops though so im leaving it

 

[TranceHead]

yay lets keep celebrating high latency ram that is going to slow down AM5 systems... haha

don't give me that "every new DDR generation takes a bit to catch up to the old generation" nah homie, that's called milking you for all you got

oh wait this is different from desktop ddr5. eh. my point still stands for desktops though so im leaving it

being that cl15 at 3200mhz is the same amount of latency time as cl30 at 6400mhz, i'm sure AM5 systems will be fine.

 

[Space Lynx]

being that cl15 at 3200mhz is the same amount of latency time as cl30 at 6400mhz, i'm sure AM5 systems will be fine.

problem... DDR5 being sold when AM5 launches will most likely be around ddr5 4800-5400 range and cas 40 or higher. unless you spend big money. they will milk the first wave of launch of the ram, they always do.

 

[TumbleGeorge]

Was promises for OC DDR5 with more than 10K MT/s Where will be limited LPDDR5X out standard speeds?

 

[docnorth]

problem... DDR5 being sold when AM5 launches will most likely be around ddr5 4800-5400 range and cas 40 or higher. unless you spend big money. they will milk the first wave of launch of the ram, they always do.

By the time AM5 really launches, DDR5 will be almost mature. I also think AMD is capable to improve next-gen CPUs and make them less memory sensitive.

 

[Wilson]

problem... DDR5 being sold when AM5 launches will most likely be around ddr5 4800-5400 range and cas 40 or higher. unless you spend big money. they will milk the first wave of launch of the ram, they always do.

Yeah, for JEDEC. Just like 3200c22.

 

[TranceHead]

problem... DDR5 being sold when AM5 launches will most likely be around ddr5 4800-5400 range and cas 40 or higher. unless you spend big money. they will milk the first wave of launch of the ram, they always do.

I think only one kit is available now at 4800 cl40, which is not great at all, but by the the time alderlake and AM5 come out, you'd expect lower timings and higher clocks, i think it's a little premature to start bashing it already.