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At the recent AI Semiconductor Forum in Seoul, Samsung Electronics revealed that it will adopt hybrid bonding in its upcoming HBM4 memory stacks. This decision is intended to reduce thermal resistance and enable an ultra‑wide memory interface, qualities that become ever more critical as artificial intelligence and high‑performance computing applications demand greater bandwidth and efficiency. Unlike current stacking methods that join DRAM dies with tiny solder microbumps and underfill materials, hybrid bonding bonds copper‑to‑copper and oxide‑to‑oxide surfaces directly, resulting in thinner, more thermally efficient 3D assemblies. High‑bandwidth memory works by stacking multiple DRAM dies on top of a base logic die, with through‑silicon vias carrying signals vertically through each layer. Traditionally, microbumps routed horizontal connections between dies, but as data rates increase and stack heights grow, these bumps introduce significant electrical and thermal limitations.
Hybrid bonding addresses those issues by allowing interconnect pitches below 10 micrometers, which lowers both resistance and capacitance and improves overall signal integrity. SK hynix has taken a different path. The company is enhancing its molded reflow underfill (MR‑MUF) process to produce 16‑Hi HBM4 stacks that comply with JEDEC's maximum height requirement of 775 micrometers. The company believes that if its advanced MR‑MUF technique can achieve performance on par with hybrid bonding, they will avoid the substantial capital investment needed for the specialized equipment that true 3D copper bonding requires. The cost and space demands of hybrid bonding equipment are significant. Specialized lithography and alignment tools occupy more clean‑room real estate, increasing capital expenditures. Samsung may mitigate some of these costs through Semes, its in‑house equipment subsidiary, but it remains uncertain whether Semes can deliver production‑ready hybrid bonding systems in time for mass production. If Samsung successfully qualifies its HBM4 stacks using hybrid bonding, which it plans to begin manufacturing in 2026, the company could gain a competitive edge over Micron and SK hynix.
View at TechPowerUp Main Site | Source
Hybrid bonding addresses those issues by allowing interconnect pitches below 10 micrometers, which lowers both resistance and capacitance and improves overall signal integrity. SK hynix has taken a different path. The company is enhancing its molded reflow underfill (MR‑MUF) process to produce 16‑Hi HBM4 stacks that comply with JEDEC's maximum height requirement of 775 micrometers. The company believes that if its advanced MR‑MUF technique can achieve performance on par with hybrid bonding, they will avoid the substantial capital investment needed for the specialized equipment that true 3D copper bonding requires. The cost and space demands of hybrid bonding equipment are significant. Specialized lithography and alignment tools occupy more clean‑room real estate, increasing capital expenditures. Samsung may mitigate some of these costs through Semes, its in‑house equipment subsidiary, but it remains uncertain whether Semes can deliver production‑ready hybrid bonding systems in time for mass production. If Samsung successfully qualifies its HBM4 stacks using hybrid bonding, which it plans to begin manufacturing in 2026, the company could gain a competitive edge over Micron and SK hynix.
View at TechPowerUp Main Site | Source
