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Yesterday, we covered the leak of Intel's plan to take on AMD in the APU space with a "Nova Lake-AX" SoC that features a relatively powerful CPU core configuration paired with an enhanced Xe3 GPU core cluster. Today, one of the most reliable leakers, Raichu, confirms what the new Nova Lake-AX configuration could look like. When it comes to the CPU, the AX SKUs will feature a downsized CPU cluster, utilizing only a single tile with eight "Coyote Cove" P-cores and 16 "Arctic Wolf" E-cores, alongside the four-core LPE island, totaling 28 cores. Where the Nova Lake-S is expected to have up to two of those CPU tiles, the AX variant cuts out the second tile to make space for one of the biggest iGPUs we've seen Intel put in its SoCs.
Coming in at 384 Execution Units (EUs), this roughly translates into 48 Xe3 cores, assuming the standard eight EUs per Xe core configuration. However, there could be some internal changes to the way Xe3 cores handle render slices, so the total number of Xe3 cores remains unknown, except for the 384 EU count. Intel is also pairing this SoC with LPDDR5X memory, which operates at 9,600 or 10,667 MT/s, providing sufficient bandwidth to the 28 CPU cores and 384 EUs over a 256-bit bus. Additionally, Raichu claims that the launch is uncertain, which means that Intel is likely evaluating the platform for profitability if it decides to produce it in high volumes. Similarly to AMD's APU, there could be significant interest, so we will have to wait and see if Intel greenlights the project for the masses. The picture below is our own modification of Arrow Lake-H breakdown, and not what the actual Nova Lake-AX SoC would look like.

View at TechPowerUp Main Site | Source
Coming in at 384 Execution Units (EUs), this roughly translates into 48 Xe3 cores, assuming the standard eight EUs per Xe core configuration. However, there could be some internal changes to the way Xe3 cores handle render slices, so the total number of Xe3 cores remains unknown, except for the 384 EU count. Intel is also pairing this SoC with LPDDR5X memory, which operates at 9,600 or 10,667 MT/s, providing sufficient bandwidth to the 28 CPU cores and 384 EUs over a 256-bit bus. Additionally, Raichu claims that the launch is uncertain, which means that Intel is likely evaluating the platform for profitability if it decides to produce it in high volumes. Similarly to AMD's APU, there could be significant interest, so we will have to wait and see if Intel greenlights the project for the masses. The picture below is our own modification of Arrow Lake-H breakdown, and not what the actual Nova Lake-AX SoC would look like.

View at TechPowerUp Main Site | Source