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AMD Answers Our Zen 4 Tech Questions, with Robert Hallock

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I think regarding gaming AMD will have a very strong product, even if has only 15-17% or around that number higher single thread performance on Cinebench 1T test.
The Cinebench 15% difference isn't at all indicative for the gaming performance, so it won't put it at 5800X3D level, after all 5800X3D was nearly -7% vs 5800X at 1T Cinebench and in gaming was 12% higher than 5800X in 720p TPU test (unless Zen 4 core has the same 32MB L3 with Zen3 core, the 5800X3D correlation is just wrong)
Now is it going to be enough to surpass Rocket Lake, I don't know.
(not because I think the Zen 4 gaming uplift won't be great, but because Raptor Lake would be at gaming at least 10-11% higher than Alder Lake imo)
However for the lower end Zen4 models (≤$450) MT performance doesn't look good vs Rocket Lake.
For example the 8core Zen 4 it will be at 13600K/KF level in Cinebench MT for example imo based on the 6P+8E cores rumor, so if Intel & AMD keep the same pricing, we are talking about $160 difference and I don't think AMD will have a strong proposition because $160 is for example 6600-6700XT or 6700XT-6800XT difference, so unless you are buying 6800XT level and above the $160 is better spend with an i5 13600K/KF and the next class VGA solution (same situation on all upcoming $110-$450 range CPUs)
 
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ppn

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looks like the modern crossbreed of C2Q and Clarkdale CoreI3. same ideas dual chiplets and desintegrated iGPU+MC, yeah what a gread idea, lets outsource the memory controller on mars so that the signal travels to the cores forever. I don't like it very much but considering there are no drawbacks in terms of added latencies between the chipset and the chiplets this is as good as perfect. meaning the full single die ryzen5 5500 with intMC seems to be doing much worse than the chiplet+IO based 5600.
 
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looks like the modern crossbreed of C2Q and Clarkdale CoreI3. same ideas dual chiplets and desintegrated iGPU+MC, yeah what a gread idea, lets outsource the memory controller on mars so that the signal travels to the cores forever. I don't like it very much but considering there are no drawbacks in terms of added latencies between the chipset and the chiplets this is as good as perfect. meaning the full single die ryzen5 5500 with intMC seems to be doing much worse than the chiplet+IO based 5600.

Heck intel did that with the Pentium D
 
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I honestly don't really care about the CPU, it looks fine. I'm more annoyed at the lack of PCIE lanes & the 4x chipset link. Anyone who has a bunch of latency sensitive devices hanging off USB or running multiple m.2 drives know how much of a PITA that thing is.
 
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I'm more annoyed at the lack of PCIE lanes & the 4x chipset link.
With PCIe 5.0 that shouldn't be too much of a problem. That or you go EPYC, since MSDT will be limited in that regards & TR (Pro) is just glorified EPYC now :shadedshu:
 
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With PCIe 5.0 that shouldn't be too much of a problem. That or you go EPYC, since MSDT will be limited in that regards & TR Pro is just glorified EPYC now :shadedshu:

Epyc lacks the frequency, Threadripper is an abandoned product afaic (my kingdom for a threadripper platform with a good high clock 16 core with actual availability). Bandwidth will help, hoping in particular that m.2 pcie 5.0 gets bifurcation (as pcie 5.0 2x looks to be plenty for storage speed, so that gets you 2 drives at least going directly to the CPU).
 
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The AM5 ILM is awfully similar with intel lga 1700, I hope there will be no bending there since ryzen 7000 substrate and IHS are square.
 
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I'm not sure if this is a dumb question or not, but since I'm not an electrical engineer, please excuse my ignorance in this matter. While I think that the heat-spreader (IHS) shape looks cool, not that it matters since it will be covered with some sort of CPU cooler, I'm worried about all those exposed capacitors on the top of the package. Seems to me if someone using a liquid metal thermal interface material between the IHS and CPU cooler's cold-plate doesn't clean up every last bit of excess liquid metal, one small drop of that could fall onto the caps below, cause a short, and fry the CPU (along with any other "incidentals" connected to the CPU).
 
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I'm not sure if this is a dumb question or not, but since I'm not an electrical engineer, please excuse my ignorance in this matter. While I think that the heat-spreader (IHS) shape looks cool, not that it matters since it will be covered with some sort of CPU cooler, I'm worried about all those exposed capacitors on the top of the package. Seems to me if someone using a liquid metal thermal interface material between the IHS and CPU cooler's cold-plate doesn't clean up every last bit of excess liquid metal, one small drop of that could fall onto the caps below, cause a short, and fry the CPU (along with any other "incidentals" connected to the CPU).
That's certainly possible if the capacitors are bare. However, the surface can be protected by a transparent polymer film, so thin that you won't notice it unless you know what to look for. I'm hoping that reviewers are going to examine that closely.
AMD should also take care to seal the IHS and all its cutouts properly, so liquid metal doesn't have a chance to seep under the lid.

and the "Castle" crenelated heatspreader looks cool
This is probably the 80,000th most frequent word in the English vocabulary, thanks for finding a good use for it. And those cutouts, they have their own fancy names as well.
1653731458136.png
 
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As bloat has a pretty poor sound to it, I'm fairly sure the standard is meant to be AVX 512 BFLOAT16 and not AVX 512 BLOAT16

Above fairly sure, actually :)
 

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The AM5 ILM is awfully similar with intel lga 1700, I hope there will be no bending there since ryzen 7000 substrate and IHS are square.
AMD has a new backplate made of thicker metal on AM5, so I doubt anything will bend.
Keep in mind that it's not just the CPU socket that is attached like on Intel, but also the cooler mounts.

PXL_20220524_033853378~2.jpg


I'm not sure if this is a dumb question or not, but since I'm not an electrical engineer, please excuse my ignorance in this matter. While I think that the heat-spreader (IHS) shape looks cool, not that it matters since it will be covered with some sort of CPU cooler, I'm worried about all those exposed capacitors on the top of the package. Seems to me if someone using a liquid metal thermal interface material between the IHS and CPU cooler's cold-plate doesn't clean up every last bit of excess liquid metal, one small drop of that could fall onto the caps below, cause a short, and fry the CPU (along with any other "incidentals" connected to the CPU).
Don't use liquid metal. Problem solved.
 
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That's certainly possible if the capacitors are bare. However, the surface can be protected by a transparent polymer film, so thin that you won't notice it unless you know what to look for. I'm hoping that reviewers are going to examine that closely.
AMD should also take care to seal the IHS and all its cutouts properly, so liquid metal doesn't have a chance to seep under the lid.


This is probably the 80,000th most frequent word in the English vocabulary, thanks for finding a good use for it. And those cutouts, they have their own fancy names as well.
View attachment 249082

we learn something everyday. I've always referred to this pattern as "jigsaw".... jig never got to saw merlon and crenel... finally united
 
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With PCIe 5.0 that shouldn't be too much of a problem. That or you go EPYC, since MSDT will be limited in that regards & TR (Pro) is just glorified EPYC now :shadedshu:
A single USB4 Gen 3×2 40Gbps connection (4.8 GB/s) will consume two PCIe 5.0 lanes (3.5 GB/s each). So lane count is a problem before the Zen 4 platform has even launched, especially if the dual-chipset version(s) have the chipsets communicating with each other via the CPU.
 
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A single USB4 Gen 3×2 40Gbps connection (4.8 GB/s) will consume two PCIe 5.0 lanes (3.5 GB/s each). So lane count is a problem before the Zen 4 platform has even launched, especially if the dual-chipset version(s) have the chipsets communicating with each other via the CPU.

There's no USB4 devices and they already got the gen whatever by whatnot stupid names going!? For fuck sake, what happened to simple names like 1, 1.1, 2.0 !?

Anyway, AM5 has 4 extra lanes for the USB4 ports (can be used for either USB4 or extra nvme). That's extra as on top of the existing x16 for GPU, x4 for m.2 and x4 for chipset (AM5 increased to 28 lanes from the previous 24 on AM4). Dual chipset connection and all that is to be seen but from a leak somewhere else it said x4 to one chipset and the second one connects through x4 to the first (that leak mentioned pcie 4.0 but AMD keeps mentioning 5.0 everywhere for x670 Extreme)

I don't think it was mentioned again, but the old leak that said that there would be no ITX boards with x670 (when MCM was being thrown around) now makes sense since 2 chipsets is too much for the size of the board (there's not enough space to take advantage of the extra IO lol). Here's to hoping someone makes an all gen5 B650 ITX board (if such a thing is possible)
 
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D

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Wonder how many beta testers there will be on TPU for this? A fair few i would imagine. I don't think its going to be the Intel destroyer that AMD users are truly hoping for, but at least its something new in the AMD camp to toy with. It's always interesting to see something new, be it from AMD or Intel even if the blue camp is seen as somewhat of a joke on TPU, lets hope AMD don't become that instead eh.
 

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A single USB4 Gen 3×2 40Gbps connection (4.8 GB/s) will consume two PCIe 5.0 lanes (3.5 GB/s each). So lane count is a problem before the Zen 4 platform has even launched, especially if the dual-chipset version(s) have the chipsets communicating with each other via the CPU.
The ASM4242 is actually only PCIe 4.0 and it looks like it's using four PCIe 5.0 lanes. I'll have more details later this week.
I also have an article coming about the chipsets, which should hopefully clear up a lot of things.

There's no USB4 devices and they already got the gen whatever by whatnot stupid names going!? For fuck sake, what happened to simple names like 1, 1.1, 2.0 !?
That's incorrect. There are at least two USB4 devices for sale already.
Anyway, AM5 has 4 extra lanes for the USB4 ports (can be used for either USB4 or extra nvme). That's extra as on top of the existing x16 for GPU, x4 for m.2 and x4 for chipset (AM5 increased to 28 lanes from the previous 24 on AM4). Dual chipset connection and all that is to be seen but from a leak somewhere else it said x4 to one chipset and the second one connects through x4 to the first (that leak mentioned pcie 4.0 but AMD keeps mentioning 5.0 everywhere for x670 Extreme)
That leak is largely correct.
I don't think it was mentioned again, but the old leak that said that there would be no ITX boards with x670 (when MCM was being thrown around) now makes sense since 2 chipsets is too much for the size of the board (there's not enough space to take advantage of the extra IO lol). Here's to hoping someone makes an all gen5 B650 ITX board (if such a thing is possible)
There will be a B650E chipset though, but we can't write about it, yet. I'm sure everyone here can work out the difference though.
 
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A single USB4 Gen 3×2 40Gbps connection (4.8 GB/s) will consume two PCIe 5.0 lanes (3.5 GB/s each). So lane count is a problem before the Zen 4 platform has even launched, especially if the dual-chipset version(s) have the chipsets communicating with each other via the CPU.
It's just my speculation: the AM5 platform may have more secrets hiding inside. The number of pins has gone up from 1331 to 1718. Sure, many of them are for additional power requirements, and the pins are smaller, so current per pin is probably lower. But I think some are reserved for future expansions that don't require many pins, like more PCIe/USB, 10G Ethernet, an additional video output, or something else.

The same goes for Intel LGA 1700/1800 vs. LGA 1200.
 

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Wonder how many beta testers there will be on TPU for this? A fair few i would imagine. I don't think its going to be the Intel destroyer that AMD users are truly hoping for, but at least its something new in the AMD camp to toy with. It's always interesting to see something new, be it from AMD or Intel even if the blue camp is seen as somewhat of a joke on TPU, lets hope AMD don't become that instead eh.
Destroyer, no, but the two will likely be neck and neck, depending on what's being benchmarked.
Intel is hardly seen as a joke, but their not so new CEO, has been good at talking, not so good at delivering.
Where is Arc? It's almost June now, still no sign of a launch or retail availability.
If we can't joke a bit about it, then things sure would be dull around here.

It's just my speculation: the AM5 platform may have more secrets hiding inside. The number of pins has gone up from 1331 to 1718. Sure, many of them are for additional power requirements, and the pins are smaller, so current per pin is probably lower. But I think some are reserved for future expansions that don't require many pins, like more PCIe/USB, 10G Ethernet, an additional video output, or something else.

The same goes for Intel LGA 1700/1800 vs. LGA 1200.
AMD only has integrated Ethernet in its embedded chips. My upcoming article about the platform should clear up most of this.
 
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There's only going to be a few use cases where it'll make sense to upgrade I think. If you're gaming at 4k or similar no point at all. Will be some who do really heavy particularly workloads for whom upgrading makes sense. Also when they bring this to servers. Still couldn't get any epyc server easily when I last checked. Can actually use all the paralism in Web and DB servers.

Returns are becoming more marginal every gen.

Me, I hope to get 5 years at least out of AM4 still.
 
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There's no USB4 devices and they already got the gen whatever by whatnot stupid names going!? For fuck sake, what happened to simple names like 1, 1.1, 2.0 !?

Anyway, AM5 has 4 extra lanes for the USB4 ports (can be used for either USB4 or extra nvme). That's extra as on top of the existing x16 for GPU, x4 for m.2 and x4 for chipset (AM5 increased to 28 lanes from the previous 24 on AM4). Dual chipset connection and all that is to be seen but from a leak somewhere else it said x4 to one chipset and the second one connects through x4 to the first (that leak mentioned pcie 4.0 but AMD keeps mentioning 5.0 everywhere for x670 Extreme)

I don't think it was mentioned again, but the old leak that said that there would be no ITX boards with x670 (when MCM was being thrown around) now makes sense since 2 chipsets is too much for the size of the board (there's not enough space to take advantage of the extra IO lol). Here's to hoping someone makes an all gen5 B650 ITX board (if such a thing is possible)
we would not see upcoming mobos coming with usb4(only few mobos have that), because usb4 controller is not yet ready until the end of this year.

same logic, then the extra 4 lanes from cpu that's supposed to be used for usb4 controller are now free, making the upcoming am5 cpu have four extra pcie lanes to connect pcie devices without needing a chipset as a pcie hub.
 

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Looks like I will go with an Intel KF processor for my next build, as a gaming laptop owner, I know all too well how many times I tried to play an old game, and Windows 'decided' it didn't need the dedicated GPU and I got a laggy gaming experience. Shame there won't even be one single model without an igpu.
You can disable the IGP in bios and it will act the same as a system without IGP. Windows can't override that.

I wonder if that 15% ST performance gain over 5950X is an SKU utilizing 3DV Cache? If not, is it possible that AMD is, as said, being very conservative with these figures and only referencing SKUs without the cache? Would an AM5 SKU with 3DV Cache push these numbers over 20-25% ST gain? If they only match the 5800X3D performance in games, I'll stick with mine longer...
Thats unlikely, they will probably release the gen 4 like they did gen 3. 4 models 6,8,12&16 core models with normal cache then sometime in 2023 release another 1ccx chip with larger cache
AMD Ryzen 7000 'Zen 4' CPUs With 3D V-Cache May Not Hit Desktops Till 2023 (wccftech.com)
Whether or not we will see 3d V-cache on a 2ccx chip is anyone's guess at this point. The first 3d v-cache prototype was a 5900x, then what went to market was 5800x-3d. The improvement is mainly for gaming workloads and it made sense to release it on 8 cores. A reboot of the Ryzen 9 chips would've been cool but would it have made sense to ad 3d cache to both ccx or limit it to 1ccx and have a gaming mode setting so only 1ccx is being utilized for games and workloads that benefit from the added 3d cache and background and other processes are shifted to the other CCX.
 

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You can disable the IGP in bios and it will act the same as a system without IGP. Windows can't override that.


my gtx 1070 laptop also has this feature. I set to "Discrete graphics only" in BIOS, reboot, and it will still sometimes by accident utilize the intel graphics for some reason. its very rare and usually only happens to older games.

but I don't care. I won't ever trust integrated graphics on my system ever again. I probably will go with a RDNA3 gpu and a 5800X3D or intel kf processer.
 
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You don't actually believe this is the actual performance increase right? They are sandbagging. Do you think they would give Intel the specs so far out from release, so they can then go an adjust pricing and performance on Raptor Lake as needed. You will see >> than 15% ST. They are quoting the bare minimums here.
I think you will be bitterly disappointed. This figure, even if somewhat conservative, won't even be enough to close the gap towards Alder Lake and Raptor Lake will obviously be even better, never mind that later in Zen4's cycle they'll be up against Meteor Lake...;) So far everything is going exactly the way someone on here (can't remember exactly who though) predicted early last year and if it continues in the same manner, AMD will be in a rather tight spot sooner, rather than later...
 

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I think you will be bitterly disappointed. This figure, even if somewhat conservative, won't even be enough to close the gap towards Alder Lake and Raptor Lake will obviously be even better, never mind that later in Zen4's cycle they'll be up against Meteor Lake...;) So far everything is going exactly the way someone on here (can't remember exactly who though) predicted early last year and if it continues in the same manner, AMD will be in a rather tight spot sooner, rather than later...

not really. ARC gpu's already are proving themselves to be shit, and AMD goes toe to toe and imo exceeds Nvidia in gaming at this point.

AMD will always have gpu's and servers to lean on. that being said, I probably will buy a intel KF chip for my next build anyway, because I don't want integrated graphics.
 
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