AVX 512 is disabled by Intel for quite a while now, unless you have an old board & older OS or get the 11900k?
I believe certain motherboard/BIOS combos should allow the option, but chasing those down might be tricky.
It will be very interesting though if any reviewer could do this comparison, especially since Alder Lake have full 512-bit vector engines while Zen 4 is "double-pumping" its 256-bit engines, and presumably Zen 4 manages to maintain higher clocks. Just take a look at the gains for Zen 4 with AVX-512
across multiple open source projects. Keep in mind that the majority of these have no manual AVX-512 optimizations, this is mostly due to enabling a compiler flag, so this is basically free performance. As I've been saying for years to critics of AVX-512; it will be amazing, and Intel's problems have been due to flawed implementation and node issues, not the underlying ISA.
For those wondering how AVX-512 can gain performance when double-pumping 256-bit vector engines; the denser code improves cache efficiency and precision of prediction and prefetching. There is also some instructions which can be completely eliminated, as loops are better unrolled and AVX-512 have many features not available in AVX2. It's worth noting that VIA have implemented AVX-512 in a similar way to AMD.
As I've been arguing in early threads about Alder Lake, this double-pumping way is how Intel should have implemented it in their E-cores.
Wow, that's a massive difference. Wonder what changed - those are based on more or less the same engine, no?
Probably some new features requiring a lot of (potentially unrefined) code. High sensitivity to instruction cache is a typical characteristic of code with low computational density, in other words "bloated code".