AMD Ryzen 9 7950X

[Valantar]

Nice observation, Far Cry 5 has been replaced with Far Cry 6, big difference in gains

https://tpucdn.com/review/amd-ryzen-7-5800x3d/images/far-cry-5-1920-1080.png

https://tpucdn.com/review/amd-ryzen-9-7950x/images/far-cry-6-1920-1080.png

Wow, that's a massive difference. Wonder what changed - those are based on more or less the same engine, no?

 

[W1zzard]

Wow, that's a massive difference. Wonder what changed - those are based on more or less the same engine, no?

Similar engine, but DX12 and of course the usual modernization updates for a new iteration of the engine. 5800X3D thrives when workloads suddenly fit in its cache and they don't fit on the other CPUs. Now I suspect either large parts of FC6 run in cache of all modern CPUs, or don't fit into 5800X3D cache either, or the developer optimized their code somehow

 

[Count von Schwalbe]

Dunia Engine 2 - Wiki says:

For Far Cry 6, Ubisoft introduced more features to the Dunia 2 engine such as ray tracing support on the PC version and support for AMD's open source variable resolution technology, FidelityFX.

Engine isn't everything though.

 

[Xero717]

Not sure if someone brought this up already, but the second chiplet not boosting as high definitely occurred in the 5000 series. I heard rumors of some 5000 series processors not having this issue, but from my experience I never ran into any 5950X before the revision that worked that way. The second CCD was often referred to as the "shitlet" with binning falling below a 5800X, basically a way for AMD to dump their low performing 8 cores.

 

[dgianstefani]

If only a certained banned TPU member who kept making new accounts to argue with me was still around, he loved to say how 12th gen was more power efficient than zen 3 in gaming
View attachment 263417AMD have finally released a CPU that's equally as power hungry!
(and at stock settings vs stock settings, intel still takes more power)



5700g is a surprise winner for efficiency here, WTAF?
View attachment 263418

Monolithic die 5700g that's why.

 

[nguyen]

Not sure if someone brought this up already, but the second chiplet not boosting as high definitely occurred in the 5000 series. I heard rumors of some 5000 series processors not having this issue, but from my experience I never ran into any 5950X before the revision that worked that way. The second CCD was often referred to as the "shitlet" with binning falling below a 5800X, basically a way for AMD to dump their low performing 8 cores.

TPU reviews mentions the same happening in 7950X review

In pure stock settings, we noticed that the boosting behavior of among the two CCDs is vastly different, with cores on the second CCD boosting anywhere between 100 to 250 MHz lower than their counterparts from the first CCD

 

[HD64G]

I will ask @W1zzard since he has the CPUs and know about the following:

Imho, a high temp operating CPU is a problem only 1) if it throttles or 2) if this heat is affecting accordingly the temp in your room/space. What of those 2 problems Zen4 creates?

 

[Xero717]

TPU reviews mentions the same happening in 7950X review

Yeah, I was referring to the very end of that paragraph that states:

"We've reproduced this CCD boosting disparity on even our 7900X sample. Older-gen 5000-series chips such as the 5950X don't exhibit this."

That's simply not true.

 

[InVasMani]

TPU reviews mentions the same happening in 7950X review

It might be by design to do with temps and latency access between CCX chiplets. Drop the second CCX clocks a bit to allow a bit more temperature headroom to boost higher on the initial CCX chiplet. They might have carefully optimized it such to reduced frequencies just enough on the second CCX to get the most reasonable uplift out of the first CCX while minimizing the relative drop off on the second CCX. The latency access for accessing cores on second CCX while reduced from earlier Ryzen chips is still very much present, but they've done a good bit to offset and minimize it better. Intel doesn't have CCX chiplets, but they still drop frequencies and boost frequencies dynamically at different ends to improve general ST performance. They pretty much do a bit of a high pass boost with a low pass cut with the turbo and boost frequencies to use for thermal headroom for higher on demand ST performance if proper thermals permit.

 

[Xero717]

It might be by design to do with temps and latency access between CCX chiplets.

If both chiplets were of an equivalent quality, they'd only be able to sell half as many 7950Xs. Purely an economics decision, and nothing else.

 

[Valantar]

If both chiplets were of an equivalent quality, they'd only be able to sell half as many 7950Xs. Purely an economics decision, and nothing else.

Probably - but then again the performance difference is essentially zero, so it doesn't cost users anything either. If your load is below 8/6 cores, then you're only loading one CCD. If your load is nT, then you're running, let's say 5.1GHz on CCD0, and maybe 4.9GHz on CCD1 - that's a 4% clock decrease on half your cores. So, this costs you 2% performance, at most, in the most extreme use cases. It's really not worth talking about.

 

[W1zzard]

Not sure if someone brought this up already, but the second chiplet not boosting as high definitely occurred in the 5000 series. I heard rumors of some 5000 series processors not having this issue, but from my experience I never ran into any 5950X before the revision that worked that way. The second CCD was often referred to as the "shitlet" with binning falling below a 5800X, basically a way for AMD to dump their low performing 8 cores.

I remember seeing small differences, even such big deltas were common on Zen 3?

 

[dgianstefani]

I remember seeing small differences, even such big deltas were common on Zen 3?

My 5950x had about 100-150mhz disparity between the chiplets.

 

[Xero717]

I remember seeing small differences, even such big deltas were common on Zen 3?

For sure. With my current chip, top end single core boost on CCD1 maxes out around ~4950 while CCD2 maxes out between 4700-4750. When overclocking all core per CCD I'm able to hit 4550 on CCD1 but only 4350 on CCD2. One of the chips I had prior would boost over 5ghz on CCD1 but CCD2 was even worse than my current.

 

[W1zzard]

Interesting, so not that out of the ordinary .. makes me wonder why AMD has had my question about it for a week, replied on Monday "researching" and nothing since .. should be trivial to answer, if it's the same as Zen 3

 

[efikkan]

AVX 512 is disabled by Intel for quite a while now, unless you have an old board & older OS or get the 11900k?

I believe certain motherboard/BIOS combos should allow the option, but chasing those down might be tricky.

It will be very interesting though if any reviewer could do this comparison, especially since Alder Lake have full 512-bit vector engines while Zen 4 is "double-pumping" its 256-bit engines, and presumably Zen 4 manages to maintain higher clocks. Just take a look at the gains for Zen 4 with AVX-512 across multiple open source projects. Keep in mind that the majority of these have no manual AVX-512 optimizations, this is mostly due to enabling a compiler flag, so this is basically free performance. As I've been saying for years to critics of AVX-512; it will be amazing, and Intel's problems have been due to flawed implementation and node issues, not the underlying ISA.

For those wondering how AVX-512 can gain performance when double-pumping 256-bit vector engines; the denser code improves cache efficiency and precision of prediction and prefetching. There is also some instructions which can be completely eliminated, as loops are better unrolled and AVX-512 have many features not available in AVX2. It's worth noting that VIA have implemented AVX-512 in a similar way to AMD.

As I've been arguing in early threads about Alder Lake, this double-pumping way is how Intel should have implemented it in their E-cores.

Wow, that's a massive difference. Wonder what changed - those are based on more or less the same engine, no?

Probably some new features requiring a lot of (potentially unrefined) code. High sensitivity to instruction cache is a typical characteristic of code with low computational density, in other words "bloated code".

 

[vmarv]

 

[Dirt Chip]

OC contest are over, the new thing is UC contest.

 

[ARF]

Nah... meh!

Affordable & Mainstream AMD B650E / B650 Motherboards From Gigabyte Pictured, Designed For Budget Ryzen 7000 PCs (wccftech.com)

 

[Denver]

@W1zzard

https://twitter.com/i/web/status/1574441621625749507

 

[W1zzard]

@W1zzard

https://twitter.com/i/web/status/1574441621625749507

I know, I did a quick test and saw +10% perf, but haven't had time for further testing. DHL Express, DHL, UPS, Fedex and German DPD came in just today, all bringing samples

 

[Count von Schwalbe]

 

[HD64G]

The Intel fastest CPUs since 9900K are sold being factory oced and thus being very hot at full load needing high end cooling. AMD just now started doing the same. And if one uses Ryzen Master curve optimizer he will get 1-2% less performance at MT-heavy apps for at least 20% less power draw and for sure better thermals. Gaming temps are low either way.

 

[mechtech]

@W1zzard

Another thing that would be interesting to see is if these were cooled with a stock zen 3 cooler how would the clocks compare to zen3??

 

[A Computer Guy]

@W1zzard

Another thing that would be interesting to see is if these were cooled with a stock zen 3 cooler how would the clocks compare to zen3??

I'd like to see performance comparisons at a normalized wattage (65, 88, 105, 142, etc..) between Zen2, Zen3, Zen4 vs. Intel 10th, 11th, and 12th gen.