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GLOBALFOUNDRIES Offers Enhanced 55 nm CMOS Logic Process

btarunr

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GLOBALFOUNDRIES today announced additional enhancements to the foundry's 55-nanometer (nm) Low-Power Enhanced (LPe) process technology platform – 55nm LPe 1V – with qualified, next-generation memory and logic IP solutions from ARM. The 55nm LPe 1V is the industry's first and only enhanced process node to support ARM's 1.0/1.2V physical IP library, enabling chip designers to use a single process that supports two operating voltages in a single SoC.

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