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Intel "Alder Lake-S" Comes in a 6+0 Core Die Variant

btarunr

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Intel's 12th Gen Core "Alder Lake-S" silicon apparently comes in two variants based on core count. The first one is a larger variant with 8 P cores and 8 E cores, while the second variant is a visibly smaller die with only 6 P cores, no E cores. This was revealed by an MSI Insider video presentation where pictures of LGA1700 packages with the two die types were shown off.

MSI also confirmed die-sizes and dimensions of the two. The larger C0 die measures 10.5 mm x 20.5 mm, working out to 215.25 mm² area. The smaller H0 die measures 10.5 mm x 15.5 mm, and a die area of 162.75 mm². The H0 silicon completely lacks "Gracemont" E-core clusters, and physically features six "Golden Cove" P cores. It's possible that given the 3 MB L3 slice size on the larger C0 silicon, the smaller H0 silicon physically features 18 MB of shared L3 cache.



Apparently the 12th Gen Core i5 series will have two classes of SKUs. One based on the C0 silicon, with 6+4 (P+E) configuration, and the other based on the H0 silicon, with 6+0 core configuration. The already launched Core i5-12600K/KF are 6+4 core, and it's expected that the i5-12600 (non-K) will have the same core-count, too. The lower Core i5 SKUs, such as the i5-12400 and i5-12400F, could be 6+0 core. Intel probably adopted this segmentation within the Core i5 lineup to ensure that the $170-$190 SKUs, such as the i5-12400/F don't cannibalize sales of the i5-12600/K/KF/F. The company had been carrying out similar segmentation within the Core i3 series in the past few generations, where the i3-xx100 and i3-xx300 series SKUs are differentiated with L3 cache sizes.



We recently spotted an i5-12400 engineering sample that confirms this core-configuration. The decision to create a smaller die for desktop could be purely economics-driven. The lower end of the Core i5 series, the Core i3 series, Pentium, and Celeron, sell in high volumes, and it makes sense for Intel to use physically smaller dies to maximize wafer utilization on its latest Intel 7 node (10 nm Enhanced SuperFin). It's also possible that the 12th Gen Core i3 series will be carved out from this silicon, by disabling two of the six P cores.

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tabascosauz

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Lemme guess......12400[F] + B660 board is going to be the most popular config this gen, because enthusiasts seem to collectively hate E-cores? Intel probably gonna gimp the boost clocks hard compared to 12600K though.

That's a great way to reap the benefits of Golden Cove without being forced to bet everything on Microsoft and Thread Director doing their jobs properly. I can't help but wonder if you can just disable E-cores altogether on all of these chips though, especially for benching and whatnot.
 
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The larger C0 die measures 10.5 mm x 20.5 mm, working out to 215.25 mm² area. The smaller H0 die measures 10.5 mm x 15.5 mm, and a die area of 162.75 mm². The H0 silicon completely lacks "Gracemont" E-core clusters, and physically features six "Golden Cove" P cores. It's possible that given the 3 MB L3 slice size on the larger C0 silicon, the smaller H0 silicon physically features 18 MB of shared L3 cache.

The H0 is quite a bit bigger than I expected it to be. I wonder if they'll launch a notebook SKU which uses the H0 die. It's very unlikely, but it'll be interesting if they do.

Now I am more interested then ever in a Gracemont only Atom SKU with Xe graphics for budget laptops.
 
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Boy are the Gracemont cores freaking tiny. Should make for a nice, smol 8 core i3 chip for budget laptops
Nah, it'll be a Pentium or Celeron, as Intel won't dilute the Core branding that much.
Also, size is very relative when it comes to these things.
 
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Lemme guess......12400[F] + B660 board is going to be the most popular config this gen, because enthusiasts seem to collectively hate E-cores? Intel probably gonna gimp the boost clocks hard compared to 12600K though.

That's a great way to reap the benefits of Golden Cove without being forced to bet everything on Microsoft and Thread Director doing their jobs properly. I can't help but wonder if you can just disable E-cores altogether on all of these chips though, especially for benching and whatnot.
That and the fact that it will likely provide the best bang for buck in the midrange, just like the last two 400(f) chips, because ever since the 3600 price hike and subsequent lack of 5600 AMD is unwilling or unable (or both) to provide in the price class that used to be their bread & butter (and has also historically included legends such as 2500k).
 
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One thing is clear now, four E cores do not take up the same space as one P core but approximately 1/3 more. So it's more like three E cores in the same space as one P core.
 
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That's a great way to reap the benefits of Golden Cove without being forced to bet everything on Microsoft and Thread Director doing their jobs properly. I can't help but wonder if you can just disable E-cores altogether on all of these chips though, especially for benching and whatnot.
Earlier this year it was said to be possible for both E and P cores, either from the command line or from the BIOS:
 
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Earlier this year it was said to be possible for both E and P cores, either from the command line or from the BIOS:
I don't think that disabling either set of cores is the best way to go ... Windows has power plans, after all, and MS could make one that strongly prefers P cores and another that strongly prefer E cores but don't outright disable anything.
 

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My curiosity is making me wonder what a 4P+16E chip would be capable of if the gracemont cores really are that small. How many P cores do you really need? Multithreaded applications that scale well shouldn't need a bunch of really fast cores.
 
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Seems like Raptor Lake, which is basically an Alder Lake refresh for 2022, is supposed to have an 8+16 version.

Honestly I think the importance of single thread is for some reason being deprecated, perhaps wrongly. Moar cores is fun and all but, to this day when I look at my CPU usage during something that I think runs a little slow, 99% of the time it is just using 1-4 threads and one of the cores is at 100%. I never really see all cores get busy unless I'm compressing / uncompressing something really big.

This is the one thing I noticed with the 10850K vs 10400 as far as more cores, is that patches and updates from Steam get installed faster and with less noticeable impact. Outside of that most things are limited to 1-4 threads.
 
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I’m not sure about 12600 non-K, it might also feature 6+0 cores, I’ll try to find this info again. IIRC about Comet Lake, 10600K is the same silicon with the bigger CPUs, but 10600 and below are built on smaller dies.

IDK why people still think Windows 10 have no use for E cores.
Nov 4th can't come sooner and put these assumptions to rest.
Yes one of the 12600K benchmarks was performed on W10.
 
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IDK why people still think Windows 10 have no use for E cores.
Nov 4th can't come sooner and put these assumptions to rest.
Apparently you need Win11 for Alder Lake, so Win10 won't even be supported.
 
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For me a desktop 4P+8E would be sweetspot, even for gaming where older games often use only upto 2-3 threads and newer titles are basically bound by 2-3 heavy threads + some parellel threads.
 
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Could you please use proper terminology instead of "... don't cannibalize sales of ..." in your articles? Thanks.
 
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Wonder if you'll able to disable half the P cores and E cores in the bios apparently you decouple their clock rates and overclock either so it could be interesting and from a efficiency standpoint just run 3 P cores with 6 E cores on the 12600K might not be bad in practice and with the 12900K similar might be done. I would think running 3P cores on the 12600K could allow for better sustained turbo boost performance and possibly overclocking the turbo a bit higher across 3 cores instead.
 
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One thing is clear now, four E cores do not take up the same space as one P core but approximately 1/3 more. So it's more like three E cores in the same space as one P core.
Huh? If you look at the die four E-cores are about the same size as 1 P-core, or even smaller.
 

sillyconjunkie

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Shopped. Hybrid (big, bigger) is the go forward plan for Intel across this product line. Initial ADL units are Intel designed/TSMC 7nm FAB, not Intel 10ESF (Intel 7). Later units will be updated Intel 7nm FAB. No more marketing spin names.

Yields are fine.
 
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Lemme guess......12400[F] + B660 board is going to be the most popular config this gen, because enthusiasts seem to collectively hate E-cores?
I'm interested in the mobile variants - 2 P-cores and 8 E-cores with a relatively big iGPU but hopefully a relatively small TDP.

I guess Intel are playing it safe this generation with the desktop silicon but I'd like to see a willingness to drop a few more P-cores to trade 4:1 for E-cores. I think most consumer stuff is either lightly-threaded or is an encode/render/transcode/compile task that will just take as many cores as it can possibly get.

For the same die-area as 8 P-cores and 8 E-cores, we could have had 4 P-cores and 24 E-cores. If an application demands more than 4C/8T of max-boost, max-IPC P-core performance then it'll probably react well to being given 24 more cores.
 

tabascosauz

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I'm interested in the mobile variants - 2 P-cores and 8 E-cores with a relatively big iGPU but hopefully a relatively small TDP.

I guess Intel are playing it safe this generation with the desktop silicon but I'd like to see a willingness to drop a few more P-cores to trade 4:1 for E-cores. I think most consumer stuff is either lightly-threaded or is an encode/render/transcode/compile task that will just take as many cores as it can possibly get.

For the same die-area as 8 P-cores and 8 E-cores, we could have had 4 P-cores and 24 E-cores. If an application demands more than 4C/8T of max-boost, max-IPC P-core performance then it'll probably react well to being given 24 more cores.

Part of me kinda agrees, but I also don't want to see what 2 P-cores + E-core gang looks like in demanding games like MW2019 (probably Vanguard and MW2022 since same engine). Upon every reinstall/major update(?)/drivers change, it runs balls to the wall AVX on all cores possible (dual Ryzen will only fill 1CCD, but still ridiculous heat). Everything is a stuttery mess until it's finished after a few minutes. Should it be better optimized? Definitely, but you know it's not going to happen. BF1 and BFV (esp) are also aggressive on AVX past 2 cores, so BF2042 is surely going to continue that.

Ngl kinda frustrated the E-cores play the same role on desktop (ie. relied on for 90% of work until something "deserving" of P-core). Since 8th gen there's a huge discrepancy on Intel on MT perf between PL2 and PL1. The E-cores' should help bridge that perf gap - but they should be only a performance reserve, instead of this insane E-cores-all-the-time BS. It's the opposite of AMD - on the slightest twitch or click of the mouse Zen 3 will aggressively turbo for a responsive experience. And Intel also did the same, up until it suddenly decided we should pay P-core money for E-core usage :confused:

Even 14nm Intel had idle power better than chiplet Ryzen (not APU), so chasing idle/low load power on desktop is a solution searching for a problem - it's the free MT perf that Intel's looking for with the E-cores. Mobile power obviously it's always important, but frankly, for a 12400F-class desktop chip, it's irrelevant. So, 6+0 is great.
 
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