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Memory Overclocking Could Pose Risks and Limits on Nehalem

btarunr

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#1
Intel's upcoming Nehalem architecture brings in a host of changes. One of the most important of them is that the processors now carry memory controllers. From what is known so far, the upcoming Nehalem processors come with official support for DDR3 800 MHz and DDR3 1066 MHz though talk is that it just could slip in DDR3 1333 MHz support on an official scale. Here's a complication: Some of the computer enthusiasts with plans of retaining their current DDR3 1800/2000/beyond may have severe problems running the memory at their rated frequencies on a Nehalem chip. They might not work on their rated frequencies at all.

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#2
Hmm, :confused: . I wonder what is the mechanical reasoning behind this. And I'm also a tad confused, synchronized voltages? But I'm not supposing people are going to be running their nehalems at 1.6v right? That's high for core 2. But you have to to get the memory to use 1.6v? That just doesn't make sense to me. And where is DDR3 800? I've never seen anything below ddr3 1066, and even at that I don't see very often.......
 
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#3
So AMD owners don't have this problem, do they?

I'm just thinking of the integrated memory controller on AMD CPU's.
 

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#4
No, the K10 IMC doesn't sync memory voltages with vCore. I can set my DDR2 to 2.30 V max.
 

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#5
This is interesting news...I'm sticking on 775 for a while...I'm sure by the time I make the jump to the new goodies, revisions and even different memory controller/mem voltage applications could be available...why do they need to be linked? Just odd imo.

Maybe they'll do the damn ratio deal here too eventually like we do now with FSB/RAM.
 
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#6
ponder .... lga775 for a while longer?
 
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#8
These chips are either going to be fixed or they will be sold only for server/workstation environment, otherwise they will die as fast as they came out...

A Nehalem of equal cost is no comparison to a Core2 or Quad overclocked.
 
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#9
Almost makes me not want to switch to Nehalem.
 
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#10
It won't take long for a company to come out with an enthusiast board with separate voltage planes for the memory and CPU (memory controller). In fact, I just don't see this as being true. As an engineer myself, there's absolutely no reason to have those two voltages linked.... there are too many memory manufacturers out there with varying operating voltage ranges. Unless this is a way for Intel to make more money by having each mem. distributor (ie. Corsair, Kingston, Cruicial, etc.) send in samples to be tested with the Nahalem processor, verify that they work, then slap a sticker of approval on their boxes.... Nehalem ready memory!!!
 
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#11
It won't take long for a company to come out with an enthusiast board with separate voltage planes for the memory and CPU (memory controller). In fact, I just don't see this as being true. As an engineer myself, there's absolutely no reason to have those two voltages linked.... there are too many memory manufacturers out there with varying operating voltage ranges. Unless this is a way for Intel to make more money by having each mem. distributor (ie. Corsair, Kingston, Cruicial, etc.) send in samples to be tested with the Nahalem processor, verify that they work, then slap a sticker of approval on their boxes.... Nehalem ready memory!!!
That's probably EXACTLY why they're doing it...If they can take in a little extra by putting more control on users, don't think they won't jump at the chance...
 
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#12
These chips are either going to be fixed or they will be sold only for server/workstation environment, otherwise they will die as fast as they came out...

A Nehalem of equal cost is no comparison to a Core2 or Quad overclocked.
Intel doesn't like overclocking what they deem to be "basic" CPUs (anything that is not an Extreme Edition), despite the money they've made with Core 2.

this makes me wonder if this is to stop overclocking on lower-end chips, maybe the EEs will have unsynced voltages.

In any case I wouldn't put 1.6v through my E8400, let alone a brand new $600+ set up.
 

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#13
Kind of disheartening to hear. I was sure they were mirroring AMDs IMC chip for chip. Looks like they wont be.
 
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#14
first gen on chip memory controller. makes sense that they'd have some trouble. think of the 754's they were single channel for a reason.
 
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#15
I still don't see this as true.... it is completely up to the motherboard manufacturers if they link the voltages for the mem. controller and the memory. Intel makes the chip that you dump into the slot; how the power is routed to the chip and all the other components on the MB is up to whoever builds the MB and not Intel. Maybe they are talking about the drive strength (voltage) of the data lines between the memory and CPU... that would make sense and should still be very easy to regulate and keep below 1.6V while being able to change both your CPU and memory voltages separately.
 

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#16
Sounds like poor planing on Intel's part. What is the benefit of synchronizing the voltage in the first place?
 
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#17
I still don't see this as true.... it is completely up to the motherboard manufacturers if they link the voltages for the mem. controller and the memory. Intel makes the chip that you dump into the slot; how the power is routed to the chip and all the other components on the MB is up to whoever builds the MB and not Intel. Maybe they are talking about the drive strength (voltage) of the data lines between the memory and CPU... that would make sense and should still be very easy to regulate and keep below 1.6V while being able to change both your CPU and memory voltages separately.
Can you expand on that drive strength thing?
 
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#18
thats either a lie, or will be changes pretty soon because it is obviously is a bad idea...
 
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#19
Can you expand on that drive strength thing?
Depending on whether the signal is LVDS, TTL, or whatever else they are using, all there is in a data line is a trace from one location to another. The easiest to understand is a regular TTL signal, where a low signal (0) is between 0 - .8V and a high signal (1) is between 2.2 - 5V Think of two chips (or in this case the CPU and memory) connected and transferring data to one another. The driver from chip 1 will send a voltage to the input of chip 2 that is either 0 - .8V for a low signal or 2.2V - 5V for a high signal. The operating voltage of either chip does not matter as long as their I/O levels are compatible. So this what I mean in this case about drive strength, the voltages of the data lines themselves. As long as the data lines from the memory are not out of spec in regards to the input of the CPU, the processor should not care at what voltage the memory is running. As far as I'm aware, increasing the voltage of the memory will increase the operating voltage of the memory chips themselves but will not modify the voltages of the data lines. I'll have to admit though, I haven't really studied the schematics of DDR2 and DDR3 memory in regards to their output driver circuits.

For me the problem with believing this news is this, say ASUS makes a motherboard for Nehalem.... what would keep them from having separate voltages for the memory and CPU (it's not a very hard thing to do.... look at AMD CPUs and motherboards). I'm still trying to search on google for the DDR3 driver circuit details but haven't found much one way or the other. I'm not saying it's impossible for Intel to go down this path, I just think it's very unbelievable.
 
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#20
The more I hear about Nehalem OCing, the more it puts me off :(. I think I might be going with AMD this next generation. Shame on greedy Intel :shadedshu
 
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#21
Who cares? As long as it's stable and runs way faster than the competition, great. If not, then it's back to the drawing board.
 

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#22
I think this is fud, and here's why:

Synchronizing vmem and vcore is a move that could only be made by someone as dense as a neutron star. Even Intel's current most hardcore processor uses 0.85v by default if you get the best of the best. If you get the worst of the worst, it uses 1.3625v by default. If LGA775 used this synchronized vcore bullshit, that processor would be toast, almost garunteed. The standard voltage for DDR2 is 1.8v, and most kits use 1.9v at least; high performance kits use 2.1v or above. Unless you've got Liquid Nitrogen 24/7 don't even think of using any LGA775. If you've got DDR3, the standard is 1.5v, a little more bearable, still needs the best of the best aircooling or even water to handle this.

The DDR3 voltage standard is 1.5v. High performance DDR3 geneally uses 1.9v-2.0v. Sure Nehalem may be able to handle more voltage, but I think it's a bit rediculous to be forced to pump 1.5v through your processor all the time. And that's with a weak-ass kit. Want a high performance DDR3 kit? Well you're running 1.9v-2.0v through your shiny new Nehalem processor all the time. It would blow up before it even started. A retardedly reverse-innovative move. Or, much more likely, FUD.
 
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#23
Depending on whether the signal is LVDS, TTL, or whatever else they are using, all there is in a data line is a trace from one location to another. The easiest to understand is a regular TTL signal, where a low signal (0) is between 0 - .8V and a high signal (1) is between 2.2 - 5V Think of two chips (or in this case the CPU and memory) connected and transferring data to one another. The driver from chip 1 will send a voltage to the input of chip 2 that is either 0 - .8V for a low signal or 2.2V - 5V for a high signal. The operating voltage of either chip does not matter as long as their I/O levels are compatible. So this what I mean in this case about drive strength, the voltages of the data lines themselves. As long as the data lines from the memory are not out of spec in regards to the input of the CPU, the processor should not care at what voltage the memory is running. As far as I'm aware, increasing the voltage of the memory will increase the operating voltage of the memory chips themselves but will not modify the voltages of the data lines. I'll have to admit though, I haven't really studied the schematics of DDR2 and DDR3 memory in regards to their output driver circuits.

For me the problem with believing this news is this, say ASUS makes a motherboard for Nehalem.... what would keep them from having separate voltages for the memory and CPU (it's not a very hard thing to do.... look at AMD CPUs and motherboards). I'm still trying to search on google for the DDR3 driver circuit details but haven't found much one way or the other. I'm not saying it's impossible for Intel to go down this path, I just think it's very unbelievable.
Thanks for explaining that a bit, I think I somewhat get it, and agree that that is more likely the case here as opposed to a synced vcore and vmem. I'm not really sure where this synchronization thing came up either, when was that announced? This article is mainly talking about not being able to reach high ddr3 speeds, as if the sync is already common knowledge. Seems like some info is missing somewhere.....
 

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#25
I'm sure intel doesn't like you guys getting $500 performance out of a $100 CPU.
But Intel has always been know for their overclocking performance. This is not like them.