This article will be important for those deciding to go with AMD x670 or x670E or B650 or b650E. From your foundings, you should just be sure that m2 slot has that PCie Gen5 possibility as the GPU will not be able to use it. Saving maybe 50 bucks on that could be invested in a bit faster GPU.
Yes and no, depending on how many PCIe lanes someone needs for their peripherals and workflows.
Both extreme and vanilla boards with two x16 Gen4/5 slots can be bifurcated to run at x8 and x8 Gen4/5. You can keep your GPU, either Nvidia or AMD, in one x8 slot (today's finding show that x8 Gen4 with Nvidia will work fine, so AMD GPU will work well too in x8), and attach another device to second x8 Gen4/5, such as NVMe RAID array.
Why are you benchmarking GPUs with a 5800X? Shouldn't you be using the best CPUs for benchmarking GPUs? You have three other options for the best gaming CPUs, Alder Lake, Zen 4, and the 5800X3D
Does it matter? He was testing PCIe bus data exchange.
Hah! PCIe 2.0 still being fine almost 16 years later
Sure, if you want that last 5% then you'll need PCIe 4.0 but these articles always prove that the PCIe race really isn't that necessary unless you're already chasing diminishing returns.
It's more about providing more bandwidth over PCIe bus to give more flexibility to attach various peripherals to less lanes as PCIe generation widens data bandwidth. You can't do too much with x16 PCIe 2.0, but you can with x16 PCIe 4.0 or 5.0. You can bifurcate and trifurcate those lanes to several slots and attach numerous peripherals, such as AIC network card, NVMe RAID array, etc.
Considering there's on average a 2% difference between PCIe 3.0 and 4.0 there would be a 0% performance inrovement from using PCIe 5.0.
Widening bandwidth on PCIe bus is more about providing more flexibility in assigning lanes to several slots for different peripherals. You can do a lot of configurations with 16 Gen5 lanes from CPU, such as two slots x8 x8, three slots x8 x4 x4, etc.
Nowadays with x16 Gen5 lanes you need much less space on motherboard to devide into several peripherals. With Gen3, you would need 64 lanes to provide the same data bandwidth.
If I were to use a two Gen 4 NVMe SSDs in RAID 0 on the M.2 slots that are wired to the chipset of a high end z790 board like the ASUS ROG Maximus z790 Extreme, would I get the full PCIe x16 for the graphics card and get speeds matching a single Gen 5 NVMe SSD that would have been installed on the Gen 5 slot?
Two NVMe Gen4 drives on the chipset in RAID0 mode cannot exceed the speed of M.2 x4 slot wiring, so you get 64 Gbps of traffic.
You would need to attach two NVMe Gen4 drives to AIC card in x8 Gen4 slot to get this unified pool to transmit over eight lanes, which gives 128 Gbps. This would match one NVMe Gen5 traffic.
The issue is that testing with the 5800X is disingenuous,
You can test with any recent CPU. The purpose was to see whether PCIe bus throughput was affected by cutting lanes or between generations. Several CPUs and GPUs should be tested for the consistency of PCIe bus throughput data. This was the first test, but HUB have tested this before in more diverse PCIe configurations. Have a watch on youtube.
