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Samsung Starts Mass Production of Most Advanced 14 nm EUV DDR5 DRAM

btarunr

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Samsung Electronics, the world leader in advanced memory technology, today announced that it has begun mass producing the industry's smallest, 14-nanometer (nm), DRAM based on extreme ultraviolet (EUV) technology. Following the company's shipment of the industry-first EUV DRAM in March of last year, Samsung has increased the number of EUV layers to five to deliver today's finest, most advanced DRAM process for its DDR5 solutions.

"We have led the DRAM market for nearly three decades by pioneering key patterning technology innovations," said Jooyoung Lee, Senior Vice President and Head of DRAM Product & Technology at Samsung Electronics. "Today, Samsung is setting another technology milestone with multi-layer EUV that has enabled extreme miniaturization at 14 nm—a feat not possible with the conventional argon fluoride (ArF) process. Building on this advancement, we will continue to provide the most differentiated memory solutions by fully addressing the need for greater performance and capacity in the data-driven world of 5G, AI and the metaverse."



As DRAM continues to scale down the 10 nm-range, EUV technology becomes increasingly important to improve patterning accuracy for higher performance and greater yields. By applying five EUV layers to its 14 nm DRAM, Samsung has achieved the highest bit density while enhancing the overall wafer productivity by approximately 20%. Additionally, the 14 nm process can help bring down power consumption by nearly 20% compared to the previous-generation DRAM node.

Leveraging the latest DDR5 standard, Samsung's 14 nm DRAM will help unlock unprecedented speeds of up to 7.2 gigabits per second (Gbps), which is more than twice the DDR4 speed of up to 3.2 Gbps.

Samsung plans to expand its 14 nm DDR5 portfolio to support data center, supercomputer and enterprise server applications. Also, Samsung expects to grow its 14 nm DRAM chip density to 24Gb in better meeting the rapidly-growing data demands of global IT systems.

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14nm? Wow thats 7 year old process tech, just wow... Something worth shouting to the normies about... Or Intel I guess...
 
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14nm? Wow thats 7 year old process tech, just wow... Something worth shouting to the normies about... Or Intel I guess...

Hey, Samsung is just playing it safe, what with heat density and all. They've made careful Notes about that. :)
 
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Can we have those 8GHz low timing RAM sticks please?
 
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14nm? Wow thats 7 year old process tech, just wow... Something worth shouting to the normies about... Or Intel I guess...

Try and make more dense RAM. It ain't that easy to make capacitators to hold enough value before refresh comes. It is massively more tough to create RAM on finer process.

So it is not even comparable with like CPU's made on finer process.
 

TokyoQuaSaR

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24Gb, a non-power of 2 for one memory die ? Wouldn't that be a first in history ? And they are supposed to achieve 512GB modules as mentionned here the other day, using 8H stacks and 32 packages (ignoring 8 packages used for ECC), that is 16Gb (2GB) per memory die. With 24Gb (3GB) they could even achieve 768GB per module. Or there are 8Gb out of 24 that are for ECC but then that's 1b of ECC for 2b of data which seems way too big and it wouldn't be consistent with the photo in this article.

Try and make more dense RAM. It ain't that easy to make capacitators to hold enough value before refresh comes. It is massively more tough to create RAM on finer process.

So it is not even comparable with like CPU's made on finer process.
Exactly !

Can we have those 8GHz low timing RAM sticks please?
4GHz you mean ? 4GHz DDR = 8000 MT/s (DDR5 8000)
 
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24Gb, a non-power of 2 for one memory die ? Wouldn't that be a first in history ? And they are supposed to achieve 512GB modules as mentionned here the other day, using 8H stacks and 32 packages (ignoring 8 packages used for ECC), that is 16Gb (2GB) per memory die. With 24Gb (3GB) they could even achieve 768GB per module. Or there are 8Gb out of 24 that are for ECC but then that's 1b of ECC for 2b of data which seems way too big and it wouldn't be consistent with the photo in this article.


Exactly !


4GHz you mean ? 4GHz DDR = 8000 MT/s (DDR5 8000)
No, he means 8 GHz, everyone refers to the real world speed, not the actual speed, of DDR, and have doen so for 20 years now. You know that.
 

TokyoQuaSaR

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No, he means 8 GHz, everyone refers to the real world speed, not the actual speed, of DDR, and have doen so for 20 years now. You know that.
It's just wrong, pros don't do that and that's my job actually. The data transfer rate is NEVER written in MHz, that's the frequency which is used to calculate the latency timings. 8000MHz would give wrong timings.
 
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It's remarkable that Samsung is calling it 14nm node, not 1y or 1z or 1a (1-alpha) as is usual for DRAM.
 
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