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TSMC 4nm Production Hit By... A Full Quarter Advance?

Raevenlord

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Here's something that has been sorely missing from tech news: good news. It seems that TSMC's development on the 4 nm manufacturing process is running better than anticipated by the company itself, which has prompted for a full quarter advancement for the test production on TSMC's next miniaturization level. Previously scheduled for test production starting on 4Q 2021, TSMC has announced that it has now moved test production to 3Q 2021.

This could mean an equivalent - or perhaps even better - reduction in volume production and time-to-market, but it's anyone's guess at this point. As notably difficult and onerous as semiconductor development is, problems are more likely to appear than not. 4 nm is expected to bring respectable improvements to the PPA equation for semiconductors over 5 nm - however, TSMC still hasn't disclosed expected gains.



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They had us in the first half, not gonna lie.
 
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Lets assume we reach 1nm node, whats next after that ?
Ecks, wye, zed, alpha, beta, gamma, and so on, until omega. By the time we reach omega, DRAM manufacturers will already run out of alphabets and will be using Chinese characters.
 
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Lets assume we reach 1nm node, whats next after that ?

pm (picometer)
zm (zeptometer)
ym (Yoctometer)
PL (Planck length, widely considered to be the smallest measure of distance, equal to about 1.6 x 10-35m.)

then comes No.Sm.TT...... as in No Smaller than this, hehehe :)
 
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N4 is an N5 optimization.
The next full node is N3.
 
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Lets assume we reach 1nm node, whats next after that ?
We are nowhere close to 1nm and we are still on double digit nanometers. 7nm, 4nm are just marketing junk.

Real nm if Intel "10nm" process would be like 12nm:

TSMC's "7nm" process is closer to 12nm too:

And from all manufacturers Samsung lies the most about actual nms. Their 5nm process is likely 12-14nm.
 
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We are nowhere close to 1nm and we are still on double digit nanometers. 7nm, 4nm are just marketing junk.

Real nm if Intel "10nm" process would be like 12nm:

TSMC's "7nm" process is closer to 12nm too:

And from all manufacturers Samsung lies the most about actual nms. Their 5nm process is likely 12-14nm.
Hmm, so what does that makes Nvidia's ampere 8nm ?
 
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In all nodes important characteristic is not transistor thickness. But all manufacturers write exactly this number.
 
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It's funny, everyone but TSMC loves and uses the "TSMC 4nm" designation. TSMC are reluctant to use it, they rather call it N4.
 
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And half of the capacity will immediately go into smartphone SoCs :mad:
In 2021 Apple+Qualcomm+Broadcom+Mediatek was exactly 50%.
 
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When you realise that every new node are more expensive per transistors and not much efficient, and that they have to disable a lot of them, the gains are debatable.
 
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God forbid any other manufacturer ever have early results like this, let alone report such things. But, will this lead to early production as well, that is the big Q.
 
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questions mattel GIF
 
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And half of the capacity will immediately go into smartphone SoCs :mad:
In 2021 Apple+Qualcomm+Broadcom+Mediatek was exactly 50%.
Iirc, smartphone don't really use "inbetween" nodes
 
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When you realise that every new node are more expensive per transistors and not much efficient, and that they have to disable a lot of them, the gains are debatable.
Omg is this a joke, wow! The transistors are a joke to you? This has got to be pretty unfortunate for TSMC, yippie Intel...

And from all manufacturers Samsung lies the most about actual nms.
Scale is junk, the cost is resistance. You pay it in performance if you consider scale the norm.
 
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Scale is junk, the cost is resistance. You pay it in performance if you consider scale the norm.
Can you speak in English?
 
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