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TSMC 5 nm Node Supply Fully Booked, Apple the Biggest Customer

AleksandarK

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TSMC has hit a jackpot with its newer nodes like 7 nm and now 5 nm, as the company is working with quite good yields. To boast, TSMC has seen all of its capacity of 7 nm being fully booked by customers like AMD, Apple, and NVIDIA. However, it seems like the company's next-generation 5 nm node is also getting high demand. According to the latest report from DigiTimes, TSMC's N5 5 nm node is fully booked to the end of 2020. And the biggest reason for that is the biggest company in the world - Apple. Since Apple plans to launch the next-generation iPhone, iPad, and Arm-based MacBook, the company has reportedly booked most of the 5 nm capacity for 2020, meaning that there are lots of chips that Apple will consume. TSMC can't be dependent only on one company like Apple, so the smaller portion of capacity went to other customers as well.


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Was AMD planning anything on 5nm in 2021? Ryzen 4 perhaps?
 
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Was AMD planning anything on 5nm in 2021? Ryzen 4 perhaps?
AMD's definitely on track for 5nm zen4 so we should likely see it in servers or even desktops before the end of next year. Of course we'll also have to see the impact of nCoV & how the global economy does by then. Then there's Intel ~ if they can stick to their "revised" roadmap for 7nm then AMD will have to bring out their best on time next year. They simply can't afford to sit back, like they did when Conroe virtually blindsided them!
 
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I believe AMD will only start utilizing 5nm in 2021 so that the products will be available in 2022. Not surprising Apple will book out 5nm for the rest of the year because they are ramping up their A14 SOC for iPhones, iPads, Macbook, etc...
 
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I don't know surely so won't speculate.
It is a possibility.

5 Oct 2018: https://community.cadence.com/caden...bytes/posts/tsmc-oip-report?pifragment-1779=2
"N5 is ready for design starts. EDA V0.5 certification is done, with V0.9 ongoing (to be complete in November). Foundation IP (standard cells, SRAM, GPIO, eFuse) all have early silicon validation results."

AMD MTS - Sep 2018 – Present
2 years. Hyderabad Area, India. FEINT. Synthesis over 7nm/5nm

"1 year ago" => R&D Engineer, II
Tools: Hsim/ Hspice/ Schematic Capture/ Extraction/ Verilog/Unix
Project/ comments: N5 for Hi Silicon and AMD
N5 for Hi Silicon and AMD
Requirements => Basic know how of SRAM, ROM circuits

Which appears again:
N5 TSMC FINFET, HDSP, UHD2PRF and HDRF2P Testchip and compiler development from scratch for Hi-Silicon and AMD @Synopsys

2013-2018 profile: L2 Macro -5nm FinFET Test Chip Layout
May 2019 - August 2019 profile: Supported L3 Cache Physical Design team -Worked with the TSMC 7nm and 5nm

October 2018 => October 2020 is well within the timeframe given EUV's speed over DUV.

EUV-will-reduce-the-time-to-yield-market-by-50-for-the-7nm-node.jpeg

  • 6-track, Ultra High Density (51nm and 57nm poly pitch)
  • 6-track, Ultra High Density (57nm poly pitch)
5nm's 57nm poly-pitch might support retapeouts of 7nm+'s 57nm poly pitch.

Timeframe from Matisse/Rome sampling in 2018; one year after risk production of 7nm DUV. Coincides, with the timeframe of Milan/Vermeer A0&B0 sampling in 2020; also one year after risk production of 5nm EUV.

Ex:
Which is pretty close to => https://www.amd.com/en/products/cpu/amd-ryzen-7-3800x
 
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This is sort of misleading, Apple needs the low power variants of these nodes, so the wafers they bought don't overlap with what AMD, Nvidia and others need for stuff like desktop chips/HPC/etc.
 
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This is sort of misleading, Apple needs the low power variants of these nodes, so the wafers they bought don't overlap with what AMD, Nvidia and others need for stuff like desktop chips/HPC/etc.
I think it has to do something with production capacity. 5nm low power is being made on the same factory line as high performance. They split the time needed for the end product. TSMC knows the capacity they can produce in a time frame. You just apply for the time TSMC needs to make those. Apple got most of the time required for 5nm wafers with low power option. The rest will probably go to AMD.
 
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N5 Q1+ 2020 shipments => AMD, Apple, Hisilicon(b4b), Bitmain (Phase 1 customers)
N5 Q1+ 2021 shipments => Mediatek, Nvidia, Qualcomm, Intel (Phase 2 customers)

There is multiple rumors but AMD is the one buying most of N5.
Apple rumor => 45,000 wafers per quarter.
AMD rumor => 60,000 wafers per quarter, till 4Q20 onwards which it is upgraded to 90,000 wafers. (Q4+ is N5 pdk 1.1 aka N5P)
Based on price rumors that is only ~320+ million USD per quarter.
Which is well within AMD's operating expenses => https://www.macrotrends.net/stocks/charts/AMD/amd/operating-expenses

It isn't the first time they paid that much anyway.



TSMC also buys AMD's CPU/GPU products, so there might be a discount for AMD. Do to the symbiotic bond they have now.
 
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I doubt TSMC is buying $320 million of AMD's products, though...
Why would they AMD is selling. Unless, the intent is do as Japan and buy 5nm products and sell them at a loss. That amount of commitment implicates that TSMC might as well just buy AMD.
 
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N5 Q1+ 2020 shipments => AMD, Apple, Hisilicon(b4b), Bitmain (Phase 1 customers)
Yeah, no Hisilicon, they've been banned from producing with TSMC.
 
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and NVIDIA ... ???? WHAT?
 
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I just can't see why AMD would need 5nm capacity in Q3 of 2020 when we will be very lucky if we see Zen 4 or RDNA 3 even in 2021, so we are talking about a year and half until AMD releases a 5nm part with current expected roadmaps.
My money would be on a 3090 killer at some point on 5nm but still RDNA 2 based and also I believe AMD have delay Zen 4 well into 2022 and we will get Zen 3+. AMD pretty much said this with their mobo support list.


From memory all orders needed to be completed before October and then the US is deciding for the world which phones we are allowed to buy.
 
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I just can't see why AMD would need 5nm capacity in Q3 of 2020
A100/7nm => 6912
GA102/8nm => 10496
Similar source as the above.

AMD got 5nm HVM in Q1 2020. It has been rumored that at least Zen3 and MI100 are 5nm products.

MI100 is the first 5nm product.
Zen3 is the second 5nm product. <== ((Milan-Genesis)00h-derivied dies are N5 and (Trento-Badami)30h-derivied dies are N5P)
Navi31 has replaced Navi21 and will be RDNA2 not RDNA3. 1H of 2021 availability. <== Third 5nm part and is N5P.
GFX1050 => Navi31
GFX1100 => RDNA3/Navi41
 
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A100/7nm => 6912
GA102/8nm => 10496
Similar source as the above.

AMD got 5nm HVM in Q1 2020. It has been rumored that at least Zen3 and MI100 are 5nm products.

MI100 is the first 5nm product.
Zen3 is the second 5nm product.
Navi31 has replaced Navi21 and will be RDNA2 not RDNA3. 1H of 2021 availability.
GFX1050 => Navi31
GFX1100 => RDNA3/Navi41

I could believe AMD has a CDNA card on 5nm soonish, and maybe a high end RDNA2 on 5nm at some point in 2021. But I really can't get on board that Zen 3 is 5nm as we have just seen too much of it for that to be the case. As I said I think the most likely option is Zen 3+ refresh using 5nm next year as Zen 4 has been pushed back into 2022.
 
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A100/7nm => 6912
GA102/8nm => 10496
Similar source as the above.

AMD got 5nm HVM in Q1 2020. It has been rumored that at least Zen3 and MI100 are 5nm products.

MI100 is the first 5nm product.
Zen3 is the second 5nm product. <== ((Milan-Genesis)00h-derivied dies are N5 and (Trento-Badami)30h-derivied dies are N5P)
Navi31 has replaced Navi21 and will be RDNA2 not RDNA3. 1H of 2021 availability. <== Third 5nm part and is N5P.
GFX1050 => Navi31
GFX1100 => RDNA3/Navi41
I don't think this is correct. The Zen 3 aka 4000 series will definitely be 7nm/7nm+. The Zen 4 aka 5000 series might be 5nm

Found this on WCCFTech site
1600426718794.png
 
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I don't think this is correct. The Zen 3 aka 4000 series will definitely be 7nm/7nm+. The Zen 4 aka 5000 series might be 5nm

It's pretty much confirmed that Zen 3 will be called the 5000 series which I personally think makes sense as they should never have called Zen+ the 2000 series.
But I am also fairly sure we will see Zen 3+ which will be on 5nm because we see Zen 4.
 
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It's pretty much confirmed that Zen 3 will be called the 5000 series which I personally think makes sense as they should never have called Zen+ the 2000 series.
But I am also fairly sure we will see Zen 3+ which will be on 5nm because we see Zen 4.
Yeah :) You are right. damn this series versus gen are so damn confusing now. :/
 
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But I really can't get on board that Zen 3 is 5nm as we have just seen too much of it for that to be the case.
It is a bit weird, but there is a bit of nuance.

All 7nm+ products are on 5nm.

It all started with a codename list on an AMD profile
7nm/6nm/5nm Renoir/Durango/Rembrandt

Renoir is an APU that has launched
Durango is a name of a city like Bixby/Promontory.
Rembrandt is an APU and it is beside the 5nm.


Rembrandt being 5nm, means Zen3 is on 5nm. Hence, everything 7nm+ is actually 5nm.
Because Rembrandt is 5nm, Cezanne being a later model is also 5nm. Cezanne being 5nm means earlier Zen3 parts are also 5nm.

Which lead to this:
  • 6-track, Ultra High Density (51nm and 57nm poly pitch)
  • 6-track, Ultra High Density (57nm poly pitch)
5nm's 57nm poly-pitch might support retapeouts of 7nm+'s 57nm poly pitch.
// Think 14LPP to 12LP or N7 to N6, but N5 does it with N7+.

I believe 7nm+ at Fab 15 is ~10K to ~30K wafer starts currently, there is no demand for it.
While 5nm at Fab 18 in January was 50K wafer starts and March was 80K wafer starts.

We can see literally two fabs(phase 1 & phase 2 of F18A) running on google maps;
fab18.jpg
 
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