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TSMC 5 nm Node Supply Fully Booked, Apple the Biggest Customer

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It is a bit weird, but there is a bit of nuance.

All 7nm+ products are on 5nm.

It all started with a codename list on an AMD profile
7nm/6nm/5nm Renoir/Durango/Rembrandt

Renoir is an APU that has launched
Durango is a name of a city like Bixby/Promontory.
Rembrandt is an APU and it is beside the 5nm.


Rembrandt being 5nm, means Zen3 is on 5nm. Hence, everything 7nm+ is actually 5nm.
Because Rembrandt is 5nm, Cezanne being a later model is also 5nm. Cezanne being 5nm means earlier Zen3 parts are also 5nm.

Which lead to this:
  • 6-track, Ultra High Density (51nm and 57nm poly pitch)
  • 6-track, Ultra High Density (57nm poly pitch)
5nm's 57nm poly-pitch might support retapeouts of 7nm+'s 57nm poly pitch.

I believe 7nm+ at Fab 15 is ~10K to ~30K wafer starts currently, there is no demand for it.
While 5nm at Fab 18 in January was 50K wafer starts and March was 80K wafer starts.

We can see literally two fabs running on google maps;
View attachment 169056

Well I really hope you are right as that would be 'epyc'!
I worry that TSMC wouldn't be able to keep up though as the EUV process takes a fair bit longer to complete even though it's simpler with less masking but the power requirements are pretty huge.
Also, this decision will have had to of been made a long time ago because TSMC's 7nm EUV process is not compatible with their 5nm EUV process, so everything will have had to of been designed for 5nm from the start and at that point HiSilicon would have been a massive partner of TSMC and so there wouldn't have been any capacity on 5nm for AMD to use.
 
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Also, this decision will have had to of been made a long time ago because TSMC's 7nm EUV process is not compatible with their 5nm EUV process, so everything will have had to of been designed for 5nm from the start and at that point HiSilicon would have been a massive partner of TSMC and so there wouldn't have been any capacity on 5nm for AMD to use.
TSMC 7nm EUV can be compatible with 5nm EUV.
6-track 57-nm poly pitch must be used in both designs.
57-nm poly pitch confirms the M1 metal layer = 57 * (2/3) => M1 with ~38-nm metal pitch.

7nm+ with 57 poly-pitch and 5nm with 57 poly-pitch have the same M1 metal pitch. Means the design is retapeout-able any 7nm+ 6-track can be ported to 5nm 6-track.

Much like how N7 to N6 goes.
N7/N6 have the same 57-nm 6-track and have the same 57-nm M1 metal pitch. So, they are re-tapeout-able.
 
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It is a bit weird, but there is a bit of nuance.

All 7nm+ products are on 5nm.

It all started with a codename list on an AMD profile
7nm/6nm/5nm Renoir/Durango/Rembrandt

Renoir is an APU that has launched
Durango is a name of a city like Bixby/Promontory.
Rembrandt is an APU and it is beside the 5nm.


Rembrandt being 5nm, means Zen3 is on 5nm. Hence, everything 7nm+ is actually 5nm.
Because Rembrandt is 5nm, Cezanne being a later model is also 5nm. Cezanne being 5nm means earlier Zen3 parts are also 5nm.

Which lead to this:
  • 6-track, Ultra High Density (51nm and 57nm poly pitch)
  • 6-track, Ultra High Density (57nm poly pitch)
5nm's 57nm poly-pitch might support retapeouts of 7nm+'s 57nm poly pitch.
// Think 14LPP to 12LP or N7 to N6, but N5 does it with N7+.

I believe 7nm+ at Fab 15 is ~10K to ~30K wafer starts currently, there is no demand for it.
While 5nm at Fab 18 in January was 50K wafer starts and March was 80K wafer starts.

We can see literally two fabs(phase 1 & phase 2 of F18A) running on google maps;
View attachment 169056


Also, I think you have Rembrandt and Cezanne the wrong way around. Cezanne is the next APU to come out it will be using Zen 3 and Vega but every indication it's still 7nm.
Then in 2022 we will see Rembrandt using Zen 3+ and RDNA2 on 6nm or possible 5nm.
 
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Cezanne is the Q1 2021 APU, and all indications are that this is 7nm (N7P, N7+ or N6).
Rembrandt is the early 2022 APU, and I agree this is 5nm.

I would love Zen 3 to be 5nm, but I don't see it.

There is a rumoured Zen 3+ refresh (Warhol) in mid 2021 however, that I can imagine being on 5nm.

CDNA may well be N5, although that would be a very large die to run on a new process.
 
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Cezanne is the Q1 2021 APU, and all indications are that this is 7nm (N7P, N7+ or N6).
Rembrandt is the early 2022 APU, and I agree this is 5nm.

I would love Zen 3 to be 5nm, but I don't see it.

There is a rumoured Zen 3+ refresh (Warhol) in mid 2021 however, that I can imagine being on 5nm.

CDNA may well be N5, although that would be a very large die to run on a new process.

EUV does love big dies as it can be so accurate.
 
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Also, I think you have Rembrandt and Cezanne the wrong way around. Cezanne is the next APU to come out it will be using Zen 3 and Vega but every indication it's still 7nm.
Then in 2022 we will see Rembrandt using Zen 3+ and RDNA2 on 6nm or possible 5nm.
Zen3 + Vega-H(Arcturus' Vega name) as indicated in a previous post are 5nm in CPU and GPU form. Thus, Cezanne which re-uses that IP must be on the same node.

Van Gogh/Mero which is Family 17h Models 90h/98h respectively is related to the Xbox Series S. 8 Zen2 cores + 24 RDNA2(Navi2x-derived) cores on the die.
Rembrandt which is Family 19h Models 40h-4Fh is the sequel part of the above. 8 Zen3 cores + 24 RDNA2(Navi3x-derived) cores on the die. <== Has to appear after Van Gogh/Mero.

Renoir/Lucienne which is Family 17h Models 60h/68h respectively is the widely loved mobile series. 8 Zen2 cores + 8 Vega(Vega20-derivied) cores on the die.
Cezanne which is Family 19h Models 50h-5Fh is the sequel part of the above. 8 Zen3 cores + 8 Vega-H(Arcturus-derivied) cores on the die. <== Has to appear after Renoir/Lucienne.

One year and six months after is the max timeframe for successive launches.
No Van Gogh parts are out... but Renoir is out. On AMD's site 4800U's launch date = 1/6/2020
At worst, Cezanne's launch would be ~6/~6/2021.

Van Gogh/Mero is 7(e-compatible)[DUV] with Xbox Series S. Rembrandt is the 5nm part(using Navi3x).
Renoir/Lucienne is N7(P/e-compatible)[DUV] with Vega20(MI50/MI60) & RDNA1 IP(VCN). Cezanne is the 5nm part(using Arcturus/Vega-H/MI100 and RDNA2(Navi2?/Navi3) IP(VCN)).

Xbox Series S die size is 197.1 mm2, so Van Gogh/Mero/Rembrandt must be near that.
Renoir die size is 156 mm2, so Lucienne is that and Cezanne must be near that.

If you don't know about AMD launching consumer versions of the S model...
Xbox One S launched as the A9-9820(Cato) = https://www.chuwi.com/product/items/Chuwi-AeroBox.html
I expect the one based on Series S will get more enthusiasm.
 
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Aquinus

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This is sort of misleading, Apple needs the low power variants of these nodes, so the wafers they bought don't overlap with what AMD, Nvidia and others need for stuff like desktop chips/HPC/etc.
At least at first. I see Apple replacing the MacBook Air and Mac Mini with ARM based CPUs first and gradually moving into their higher power devices like the MacBook Pro, iMac, etc. They already have the chips for low power devices. Even the ARM transition kit is just an iPad chip put into a Mac Mini form factor. If Apple already has designs for higher power ARM chips, then I wouldn't be surprised if they're starting to ramp up production for those devices to release them at some point next year.
 
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Seronx wrote:

"Because Rembrandt is 5nm, Cezanne being a later model is also 5nm. Cezanne being 5nm means earlier Zen3 parts are also 5nm."

That's why we said you got them the wrong way around.

If you are right, and 7nm+ means "7nm or better" rather than N7+, then that's great if it turns out to be N5.
We will see, hopefully fairly soon (I'm hoping for 21Q1 for Cezanne).
 
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I would love Zen 3 to be 5nm, but I don't see it.
Zen 2 is already 7nm. It is not like Zen 3 is cooking up an unknown recipe.
7+ nm is 5nm EUV compatible 7nm EUV. Which is pretty much as good as 5nm DUV, hence "7+ nm" EUV.
 
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  • TSMC developing 2nm tech at new R&D center

Auftragsfertiger: TSMC arbeitet mit Apple an 2-nm-Prozess


 
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That's why we said you got them the wrong way around.
Later model is this meaning:
Family 19h Model 40h-4Fh => Rembrandt
Family 19h Model 50h-5Fh => Cezanne

Cezanne is a later model than Rembrandt. But, it doesn't mean Rembrandt will come out sooner.

If and using the given Rembrandt is 5nm with Models 40h-4Fh, then Models 50h-5Fh which is Cezanne and is after 40h-4Fh must also be 5nm.

Random non-topic stuff that isn't about AMD actually being the biggest customer of 5nm;
The given Family 19h models known:
00h-0Fh = Genesis // Used for Milan(Zen3) -- SP3
10h-1Fh = Stones // Used for Genoa 1.0(Zen3) -- SP5
20h-2Fh = Vermeer // AM4
30h-3Fh = Badami // Used for Trento(Zen3) -- SP3
40h-4Fh = Rembrandt // FP7, FP7r2, FM5
50h-5Fh = Cezanne // FP6, AM4
Later models after this should be Zen4 processors.

Stones is followed up by Floyd which is Genoa 2.0(Zen4) -- SP5.
Vermeer is followed up by Raphael which is on AM6.

HBM2 floorplan overlayed on the Matisse die.
hbm2matisse.jpg


Stones/Floyd w/ SP5 is a X3D platform.
 
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Vermmer is followed up by Raphael which is on AM6.

Surely they are not going to change mobo after 1 generation??

If you believe that 5nm has been ready for a while, so much so that AMD can release their Zen 3 range on it in a few weeks then do you think think products in 2022 will be on 3nm?
 
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Surely they are not going to change mobo after 1 generation??
AM4: Summit Ridge, Pinnacle Ridge, Bristol Ridge, Raven Ridge, Raven2, Picasso, Matisse, Renoir, Dali, Vermeer, Cezanne.
One generation? It's practically AMD's longest supported desktop socket. Excavator -> Zen -> Zen+ -> Zen2 -> Zen3.

If you believe that 5nm has been ready for a while, so much so that AMD can release their Zen 3 range on it in a few weeks then do you think think products in 2022 will be on 3nm?
All the information I have been loaded with... I can say yes AMD can probably get 3nm out in 2022.
 
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AM4: Summit Ridge, Pinnacle Ridge, Bristol Ridge, Raven Ridge, Raven2, Picasso, Matisse, Renoir, Dali, Vermeer, Cezanne.
One generation? It's practically AMD's longest supported desktop socket. Excavator -> Zen -> Zen+ -> Zen2 -> Zen3.

I was referring to this line:
"Vermeer is followed up by Raphael which is on AM6."
 
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I was referring to this line:
"Vermeer is followed up by Raphael which is on AM6."
Yep, they did it with Kaveri/Godavari and Carrizo/Bristol.

Kaveri/Godavari => FM2+ (A10-7850K/A10-7870K)
Carrizo/Bristol => AM4 (A12-8870 Pro/A12-9800)

For desktop:
Zen3 is an offering to legacy, Zen4 starts the new socket and supports Zen5(potentially, Zen6&Zen7 as well).
 
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Yep, they did it with Kaveri/Godavari and Carrizo/Bristol.

Kaveri/Godavari => FM2+ (A10-7850K/A10-7870K)
Carrizo/Bristol => AM4 (A12-8870 Pro/A12-9800)

For desktop:
Zen3 is an offering to legacy, Zen4 starts the new socket and supports Zen5.

I don't think you have your code names right.

Vermeer is just about to come out Q4 2020, it's Zen 3 on AM4 (and I think it will be 7nm but you think 5nm, that's fine, we'll find out soon enough)
Then there is a Vermeer refresh called Warhol 2H 2021, also Zen 3 based, not confirmed but likely AM4 still, I believe this could possibly be the first 5nm CPUs we see.
Then we move to Raphael in 1H 2022, this is the first Zen 4 (def 5nm) and will be the first on AM5 (not 6).
AM6 doesn't come into play until at least Zen 5 and probably longer.
 
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I don't think you have your code names right.

Vermeer is just about to come out Q4 2020, it's Zen 3 on AM4 (and I think it will be 7nm but you think 5nm, that's fine, we'll find out soon enough)
Then there is a Vermeer refresh called Warhol 2H 2021, also Zen 3 based, not confirmed but likely AM4 still, I believe this could possibly be the first 5nm CPUs we see.
Then we move to Raphael in 1H 2022, this is the first Zen 4 (def 5nm) and will be the first on AM5 (not 6).
AM6 doesn't come into play until at least Zen 5 and probably longer.
SP3 -> SP5
AM4 -> AM6
FM3 -> FM5
New sockets skip two.

AM5 socket = FT5 BGA, AM5 is the successor to AM1.
Warhol replaces Dali & Pollock and these range of parts:

Dali & Pollock (Dual-core/3CU) => Warhol (Quad-core/3CU)
Primary competiton => Raspberry Pi 5 BCM2718, PicoRio v3.0, and other chips.
 
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SP3 -> SP5
AM4 -> AM6
FM3 -> FM5
New sockets skip two.

AM5 socket = FT5 BGA, AM5 is the successor to AM1.
Warhol replaces Pollock and these parts:

Dali & Pollock (Dual-core/3CU) => Warhol (Quad-core/3CU)
Primary competiton => Raspberry Pi 5 BCM2718, PicoRio v3.0, and other chips.

Oh right, well that's odd but I understand why you are calling it AM6 now although I don't think I've seen that anywhere before either.
 
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Oh right, well that's odd but I understand why you are calling it AM6 now although I don't think I've seen that anywhere before either.
Leaked roadmaps are all over the place. I assume AMD wants to catch people or something.

Vermeer is succeeded by Raphael <= Unicorn succeeds this. https://www.art.com/products/p22111...nardo-da-vinci-lady-with-a-unicorn-c-1480.htm & https://en.wikipedia.org/wiki/Young_Woman_with_Unicorn
Van Gogh is succeeded by Rembrandt <= Phoenix succeeds this. https://www.themorgan.org/rembrandt/print/161920
Renoir is succeeded by Cezanne <= Dragon succeeds this. https://www.alamy.com/still-life-wi...-1931artist-edouard-manet-image262756346.html
Dali & Pollock is succeeded Warhol // N4 cost-effective APU name hasn't been dropped yet, given the above it will probably be turtle related. *bad case of cough* https://www.masterworksfineart.com/artists/andy-warhol/screen-print/turtle-1985/id/w-3507 & https://www.artnet.com/auctions/artists/andy-warhol/vanishing-animals-galapagos-tortoise */cough*
 
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I see you guys and it makes me remember that I still know nearly nothing about hardware current market :twitch:
Even if I followed you on current trend, main buyers, and how fabs works, you lost me knowing like the whole market forecast for the next 2 years ...

You killed me (*runs crying*).
 
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I used Bounce Alerts to buy every spare 5 nm wafer. It works great!
 
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Pure sillyness here but, could it be: 5nm + zen 3 = 8 so 8th October? All the 7nm stuff was on the 7th day of a month I seem to recall.

Now what about 28th for RDNA2?
 
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Without me being an expert in foundries/lithography, but AMD is launching Zen3 and RDNA2 next month, they are practically finished products based on 7nm (or +) node. There is no chance of sudden 'shrink' of those in few weeks. On the other hand, both (and future APU based on Zen3) need to be 'exploited' - made money from - for a decent time, just like previous architectures. That leaves plenty of time for different node to enter the production (and Apple with all their money to claim it for themselves) and TSMC to increase 5nm production volume and other manufacturers, not just AMD, to take a piece of that pie.
 
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