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TSMC 5 nm Node Supply Fully Booked, Apple the Biggest Customer

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Without me being an expert in foundries/lithography, but AMD is launching Zen3 and RDNA2 next month, they are practically finished products based on 7nm (or +) node. There is no chance of sudden 'shrink' of those in few weeks.
It isn't much of a sudden shrink.

N7+ was finished in mid-2018 at TSMC.
N5 was finished in early-2019 at TSMC.

N7+ at TSMC was getting a lot of flack as being bad. With most of customers cancelling their orders for N6 for non-cadence products and N5 for cadence products.
N7+ was projected to 100 million Taiwan dollars for it's volume production of 2019. For 2020, it was absorbed into N7 revenue which is shared between N7/N7+/N6. Which indicates they don't want to talk about it going forward.

N5 at TSMC was getting huge praises as being good. Being a very strong node for mobile and HPC.
Compared to above, N5 was projected for 10% of annual wafer revenue and 8% after COVID19.

Non-cadence = They switch to whatever node on their timetable.
Cadence = They switch when the foundry provides. (Two year cadence: 14nm/2016 -> 7nm/2018 -> 5nm/2020 -> 3nm/2022)

The general idea is AMD had two designs:
Zen3 on 7nm family nodes and Zen3 on 5nm family nodes. Which started development near each other.

As 7nm+ became more negative at TSMC, then the 5nm node getting praised at being ahead of schedule. The logical conclusion is to have the Zen3 on 5nm design to be preferred.

early_engagement.jpeg
Zen3 on 7nm+ engagement in 2018. => Thursday, January 9, 2020 tapeout
Zen3 on 5nm engagement in 2018 => Sunday, August 4, 2019 tapeout

Third quarter 2018 => 7nm+ risk production
First quarter 2019 => 5nm risk production
 
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I don't think you have your code names right.

Vermeer is just about to come out Q4 2020, it's Zen 3 on AM4 (and I think it will be 7nm but you think 5nm, that's fine, we'll find out soon enough)

Leaked roadmaps are all over the place. I assume AMD wants to catch people or something.

Looks like I was right on Zen 3 being 7nm Seronx.
 
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Looks like I was right on Zen 3 being 7nm Seronx.
Not to steal your thunder, but it was always the case that AMD was going to use what was to become of '6nm'.
If anything, they would have renamed it to 6nm since they always use this as a branding scheme.
The thumbnail, "(DUV and EUV combined)" might infer 7nm and 5nm.
There must be some misnomer.
It says here;

This isn't the citation I was willing to make, there was something about a free upgrade path. This could be the difference between 5nm new design necessitated vs. 6nm old design compatible.

Been on a goose chase.
Does anybody have information on AMD's business relations? It seems AMD gets a good reception. Like a golden partner, or something.
I see no other reason why some more pronounced partners cannot lay waste to TSMC's output which might have happened with the 6nm thingy.
AMD both had access to DUV 7nm and EUV optimised DUV 7nm(6nm) first. Now this is happening all over again for optimised 7nm EUV(5nm)...
Now that is a precedent - AMD is picking high yield output nodes. How TSMC is letting them is beyond me.
N5 is the real successor of N7, with N7+ as an intermediate process
but N7P and its successor N6 are kind of cheaper upgrade path with very much common design rules
AMD did plan with the N7 --> N5 hard jump from the beginning
N5 entered risk production in march 2019, so last year
i think we will see Desktop Zen4 (YES Zen4) maybe 7-7-2021 because i think N5 high-perf will enter volume production end 2020 or early 2021

klick on the info tabs, for more info
 
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6nm nomenclature was dropped 2 years ago.

That's fine but Seronx seemed very sure that Zen 3 was going to be manufactured on 5nm. I was pretty sure it would be 7nm, I said I would come back after the announcement to either congratulate him or tell him I told you so. It was the latter!
 
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That's fine but Seronx seemed very sure that Zen 3 was going to be manufactured on 5nm. I was pretty sure it would be 7nm, I said I would come back after the announcement to either congratulate him or tell him I told you so. It was the latter!
If we seperate the process node from the process lithography 5nm DUV, 7nm DUV, 5nm EUV and 7nm EUV can mean very different things. In fact, we can surmise 6nm was supposed to be 5nm EUV design compatible 7nm DUV because otherwise it wouldn't classify as a design port.
I think the error was on my part for joining in the 5nm bandwagon. There was just no way it would come true. AMD was always going for the transportable variant.
 
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If we seperate the process node from the process lithography 5nm DUV, 7nm DUV, 5nm EUV and 7nm EUV can mean very different things. In fact, we can surmise 6nm was supposed to be 5nm EUV design compatible 7nm DUV because otherwise it wouldn't classify as a design port.

Is 7nm DUV design compatible with 5nm EUV??? I wouldn't have thought so, that's why AMD would have needed to have chosen which node it was going to use a long time ago.
 
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Is 7nm DUV design compatible with 5nm EUV??? I wouldn't have thought so, that's why AMD would have needed to have chosen which node it was going to use a long time ago.
Yes yes, that is the whole gist of it. AMD is exploiting whatever new design rules TSMC is developing for 5nm EUV backported over to 7nm DUV. It is cheaper and moves volume at the same time.
PS: I wouldn't say 7nm, 6nm is more fitting.
 
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Yes yes, that is the whole gist of it. AMD is exploiting whatever new design rules TSMC is developing for 5nm EUV backported to 7nm DUV. It is cheaper and moves volume at the same time.

So you are saying if AMD wanted to it could switch to 5nm EUV production tomorrow for Zen 3? Could you link me to articles as to why you believe this please.
 
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So you are saying if AMD wanted to it could switch to 5nm EUV production tomorrow for Zen 3? Could you link me to articles as to why you believe this please.
No, AMD always held the option to 'port to a node' which was itself ported over from 5nm. Like Ryzen 2 and 3 difference and also Nvidia Turing. I suppose Nvidia also had intended their Turing for Samsung 10nm, but later backported to TSMC 12nm. Similar to it, but consider TSMC is paying for the design migration from 7nm to 6nm.
I say it here actually. How good of me to think ahead. Here, "Direct-migration" is the word. Look to the caption.
The thumbnail, "(DUV and EUV combined)" might infer 7nm and 5nm.
There must be some misnomer.
It says here;

This isn't the citation I was willing to make, there was something about a free upgrade path. This could be the difference between 5nm new design necessitated vs. 6nm old design compatible.

Been on a goose chase.
 
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Looks like I was right on Zen 3 being 7nm Seronx.
Hey, I think the fish rots from the head down. Take a look, I think I found where this Zen 3 miscommunication has originated.
Good guy, AMD...
 
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Hey, I think the fish rots from the head down. Take a look, I think I found where this Zen 3 miscommunication has originated.
Good guy, AMD...

I guess the lesson here is be careful what you believe, get to know your sources, weigh up their authenticity.
AMD's first major 5nm product, I believe, will be Raphael which is Zen 4 in 2022. They will bring a Zen 3+ refresh in the name of Warhol around Q3 next year which will improve upon the standard 7nm they are currently using, just adding a little more CPU clock, a little better efficiency, etc.
 
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I guess the lesson here is be careful what you believe, get to know your sources, weigh up their authenticity.
AMD's first major 5nm product, I believe, will be Raphael which is Zen 4 in 2022. They will bring a Zen 3+ refresh in the name of Warhol around Q3 next year which will improve upon the standard 7nm they are currently using, just adding a little more CPU clock, a little better efficiency, etc.
The marketing pull direction is exhaustive even for me, I'll concede on that. Still, I have come across in the past some editorial self served sensationalism in order to make the news headline. Contrary to what one might think, it is all fair play when NOT under NDA - come to think of it, sometimes it amazes me how we have factual reporting outside of launch windows when there is no overriding rule of public engagement.
 
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The marketing pull direction is exhaustive even for me, I'll concede on that. Still, I have come across in the past some editorial self served sensationalism in order to make the news headline. Contrary to what one might think, it is all fair play when NOT under NDA - come to think of it, sometimes it amazes me how we have factual reporting outside of launch windows when there is no overriding rule of public engagement.

There are very few real leakers today, the punishment is too great and the bait is too often poisoned.

99% of 'leaks' are marketing released promotional pieces or someone wanting 5 mins of fame and so makes something up and claims it to be a leak. If they are smart they will be close enough so they can be looked upon as 'not wrong'. If you have a few of these then you are allowed 'it probably was true but it must have changed last minute'!

The only time you get stuff come out that these companies don't control is at the final stages when too many people know too much and so many different people could slip something out that it can't be traced to one person.

The skill in seeing what is coming is absorbing all the leaks then filtering the truth from the facts from the hype from the misdirection from the lies.
 
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