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TSMC Expects Most 7nm Customers to Move to 6nm Density

Raevenlord

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TSMC in its quarterly earnings call expressed confidence in that most of its 7 nm (N7) process production node customers would be looking to make the transition to their 6 nm (N6) process. In fact, the company expects that node to become the biggest target for volume ordering (and thus production) amongst its customers, since the new N6 fabrication technology will bring about a sort of "backwards compatibility" with design tools and semiconductor designs that manufacturers have already invested in for its N7 node, thus allowing for cost savings for its clients.

This is despite TSMC's N6 process being able to take advantage of extreme ultraviolet lithography (EUVL) to lower manufacturing complexity. This lowering is achieved by the fact that less exposures of the silicon are required for multi-patterning - which is needed today as TSMC's N7 uses solely deep ultraviolet (DUV) lithography. Interestingly, TSMC expects other clients to pick up its N7+ manufacturing node that aren't already using their 7nm node - the need to develop new tools and lesser design compatibility between its N7 and N7+ nodes compared no N7 and N6 being the justification. TSMC's N7+ will be the first node to leverage EUV, using up to four EUVL layers, while N6 expands it up to five layers, and the upcoming N5 cranks EUVL up to fourteen (allowing for 14 layers.)



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While I think this is all grand and what not,
I have to wonder...

At what point does H/W reliability drop off a cliff
with these ever finer resolutions???

Inquiring minds and all that...
 
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While I think this is all grand and what not,
I have to wonder...

At what point does H/W reliability drop off a cliff
with these ever finer resolutions???

Inquiring minds and all that...
EUV is meant to add reliability and ease of manufacturing (less multipatterning).
I think things might get tough around sub 3nm nodes. Until then we will likely see 7>6>5>4>3 not big jumps like have seen so far from 28>16>14>12>7 etc.
 
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7nm is bad. It actually costs more per transistor. Apple was forced to increase iPhone's price for minor improvements and AMD was forced to make a clearly inferior GPU. Anybody except TSMC skipped, dropped or failed to develop it not for nothing.

EUV is supposed to change everything. 7nm+'s EUV is limited. 5nm is supposed to utilize EUV sufficiently. However TSMC seems not to believe 5nm since it announced and recommended 6nm after start of the 5nm's risk production.
 
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Apple was forced to increase iPhone's price for minor improvements and AMD was forced to make a clearly inferior GPU.
None of that is true.

7nm is bad. It actually costs more per transistor.
That's the trend, nothing out of the ordinary,

Anybody except TSMC skipped, dropped or failed to develop it not for nothing.
For nothing you say ? You mean the node that is out and people are already using ?
 
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I'm not a English speaker and I don't understand 'for nothing' part. Sorry about that.
Cost per transistor is decreasing. https://www.icknowledge.com/news/Technology and Cost Trends at Advanced Nodes - Revised.pdf
page 8
It claims 7nm has lower cost per unit but I don't think so. 7nm Vega is 1.6 times more dense than 14nm but the wafer cost is almost doubled from 16nm. I think 7nm's yield is not improved from 16/14nm.

iPhone's price is increasing https://edge.alluremedia.com.au/uploads/businessinsider/2018/09/BOM-v-price.jpg

https://browser.geekbench.com/ios-benchmarks
In single core, A12's improvement over A11 is 13%. A11 : A10 is 26%. A10 : A9 is 52%
In multi core, A12 : A11 is 10%. A11 : A10 is 76%. A10 : A9 is 46%.
 
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