AMD Kaveri's absolute best specifications are not; 4 Cores with 1 x 256-bit Flex FPU and 1 x 128-bit MMX/Shuffle. 8 CUs with 512 ALUs, 32 TMUs, 8 ROPs. 128-bit DDR3. AMD's Kaveri's absolute best are; 4 Cores with 2 x 256-bit Flex FPU and 1 x 256-bit MMX/Shuffle. 16 CUs with 1024 ALUs, 64 TMUs, 16 ROPs. 128-bit DDR3 + 128-bit DDR3/GDDR5 or 256-bit DDR3/GDDR5. (Wording for the combo is weird) --- https://i.imgur.com/fO8I6GO.png ^-- Steamroller from the imgur/discus leak. I have fixed it to a point where you can see that the actual and leak are the same. ---- ---- https://i.imgur.com/BLQ9Nuk.jpg https://i.imgur.com/sXNYo0K.jpg ^-- Tahiti's 16 CUs within Kaveri and measurement. Oddly, no one was surprised to find out Kaveri's CUs are 7.1 mm². For consideration; Tahiti: ~5.5 mm² Hawaii : ~4.9 mm² Pitcairn: ~4.4 mm² ----- 28nm-SHP is not less dense than TSMCs 28nm-HP(x) nodes. Instead it is very much more dense! 28nm-SHP: ~100nm for CPP(source to drain length (divide by 4 to get Gate Length)) ~80nm for 1x metal layers (double patterning) 28nm SHP is the bulk version of IBM's 22nm SOI. AMD is also using HDL with this node so instead of the max 15 metal layers, AMD is only using 12 metal layers. Reasoning for AMD releasing a half disabled part; New Node, New Problems. Instead of affecting time to market for a fix, AMD disabled the problem parts then released it to achieve Time To Market requirements. We will eventually be getting Kaveri 2.0, sooner or later.