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AMD Park

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Park
Block Diagram
Block Diagram
AMD's Park GPU uses the TeraScale 2 architecture and is made using a 40 nm production process at TSMC. With a die size of 59 mm² and a transistor count of 292 million it is a very small chip. Park supports DirectX 11.2 (Feature Level 11_0). It features 80 shading units, 8 texture mapping units and 4 ROPs.
Further reading: Evergreen Series Instruction Set Architecture

Graphics Processor

GPU Name
Park
Architecture
TeraScale 2
Foundry
TSMC
Process Size
40 nm
Transistors
292 million
Density
4.9M / mm²
Die Size
59 mm²
Released
Jul 2nd, 2011

Graphics Features

DirectX
11.2 (11_0)
OpenGL
4.4
OpenCL
1.2
Vulkan
N/A
Shader Model
5.0
Compute
GFX4

Render Config

Shading Units
80
TMUs
8
ROPs
4
Compute Units
2
Z-Stencil
4
L1 Cache
8 KB per CU
L2 Cache
128 KB
Max. TDP
19 W

All TeraScale 2 GPUs

Graphics cards using the AMD Park GPU

Name Chip Memory Shaders TMUs ROPs GPU Clock Memory Clock
AMD Radeon HD 6230 Park S3 LP 512 MB 80 8 4 650 MHz 667 MHz

Park GPU Notes

Architecture Codename: Evergreen
Chip Variant: Cedar
Graphics/Compute: GFX4
Display Core Engine: 4.0
Unified Video Decoder: 2.3