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AMD Vesuvius

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Vesuvius
Die Shot
Die Shot
Block Diagram
Block Diagram
SE Diagram
SE Diagram
AMD's Vesuvius GPU uses the GCN 2.0 architecture and is made using a 28 nm production process at TSMC. With a die size of 438 mm² and a transistor count of 6,200 million it is a very big chip. Vesuvius supports DirectX 12 (Feature Level 12_0). It features 2816 shading units, 176 texture mapping units and 64 ROPs.

Graphics Processor

GPU Name
Vesuvius
Architecture
GCN 2.0
Foundry
TSMC
Process Size
28 nm
Transistors
6,200 million
Density
14.2M / mm²
Die Size
438 mm²
Released
Apr 29th, 2014

Graphics Features

DirectX
12 (12_0)
OpenGL
4.6
OpenCL
2.0
Vulkan
1.2.131
Shader Model
6.3
Compute
GFX7
ROCm
Yes

Render Config

Shading Units
2816
TMUs
176
ROPs
64
Compute Units
44
Z-Stencil
256
ACEs
8
GEs
4
L1 Cache
16 KB per CU
L2 Cache
1024 KB
Max. TDP
500 W

All GCN 2.0 GPUs

AMD GPU Architecture History

Graphics cards using the AMD Vesuvius GPU

Name Chip Memory Shaders TMUs ROPs GPU Clock Memory Clock
AMD Radeon R9 295X2 Vesuvius XT 4 GB 2816 176 64 1018 MHz 1250 MHz

Vesuvius GPU Notes

Architecture Codename: Volcanic Islands
Chip Variant: Hawaii
CLRX Version: GCN 1.1
Graphics/Compute: GFX7 (gfx701)
Display Core Engine: 8.5
Unified Video Decoder: 4.2
Video Compression Engine: 2.0